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authorChristian Geddes <crgeddes@us.ibm.com>2018-12-14 12:05:49 -0600
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-12-18 11:14:20 -0600
commit6620644f74356d93653e582337d2cbb134778b4f (patch)
tree9edcaa616f159faeebbe4c3e7057cfe89e147f5b
parent5df2c7f08c0ee9bf2d7b7159f47a2677af41e2ea (diff)
downloadtalos-hostboot-6620644f74356d93653e582337d2cbb134778b4f.tar.gz
talos-hostboot-6620644f74356d93653e582337d2cbb134778b4f.zip
Write SPD to DDIMM eeproms for axone simics
The goal for axone is to read VPD from real HW so we need to preload the simics model with the data we want until they do it for us Change-Id: I1cf337a5bd90a62600d1e8cf43f3e429308992ba Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69874 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
-rwxr-xr-xsrc/build/simics/standalone.simics56
1 files changed, 44 insertions, 12 deletions
diff --git a/src/build/simics/standalone.simics b/src/build/simics/standalone.simics
index e9b177fae..413c6abf9 100755
--- a/src/build/simics/standalone.simics
+++ b/src/build/simics/standalone.simics
@@ -27,15 +27,41 @@ if ($hb_skip_vpd_preload == 0) {
# PNOR eyecatch MVPD
echo " - MVPD at 0x79000"
($hb_pnor).load-file ./sysmvpd.dat.ecc 0x79000
+ if ($hb_mode == 1){
# PNOR eyecatch DJVPD
echo " - DJVPD at 0x31000"
($hb_pnor).load-file ./sysspd.dat.ecc 0x31000
+ }
# PNOR eyecatch CVPD
echo " - CVPD at 0x109000"
($hb_pnor).load-file ./sysmemvpd.dat.ecc 0x109000
} except { echo "ERROR: Failed to preload VPD into PNOR." }
}
+# If Axone and Beyond, load VPD into DDIMM VPD
+if ($hb_mode == 0){
+ $dimmSpd = $hb_script_location + "/dimmspd.dat"
+
+ ddimm0.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM0"
+ ddimm1.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM1"
+ ddimm2.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM2"
+ ddimm3.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM3"
+ ddimm4.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM4"
+ ddimm5.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM5"
+ ddimm6.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM6"
+ ddimm7.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM7"
+ ddimm8.VPD_0_image.load-file $dimmSpd
+ echo " - loaded SPD to DDIMM8"
+}
+
# Turn on all processor cec-chips
if ($hb_mode == 1) {
# Nimbus/Cumulus
@@ -70,23 +96,29 @@ try {
run-python-file (lookup-file hbfw/ipmi_bt_responder.py)
} except { echo "ERROR: Failed to load IPMIresponder." }
-#Cumulus/Nimbus
-if ($hb_mode == 1) {
- # Setup fabric ID for master proc
- ($hb_masterproc_cecchip).invoke parallel_store SCOM 0x1000008 "00000000_00000000" 64 #group=0, chip=0
+# Setup fabric ID for master proc
+($hb_masterproc_cecchip).invoke parallel_store SCOM 0x1000008 "00000000_00000000" 64 #group=0, chip=0
+
+###################################
+#Enable SBE
+###################################
+echo "Enable the SBE"
+# Set mailbox scratch registers so that the SBE starts in plck mode
+# Set Boot Freq valid bit (bit 3) and valid data bit (bit 7)
+($hb_masterproc_cecchip).invoke parallel_store SCOM 0x5003F "31000000_00000000" 64
+($hb_masterproc_cecchip).invoke parallel_store SCOM 0x5003A "00000000_00000000" 64
- ###################################
- #Enable SBE
- ###################################
- echo "Enable the SBE"
- # Set mailbox scratch registers so that the SBE starts in plck mode
- # Set Boot Freq valid bit (bit 3) and valid data bit (bit 7)
- ($hb_masterproc_cecchip).invoke parallel_store SCOM 0x5003F "31000000_00000000" 64
- ($hb_masterproc_cecchip).invoke parallel_store SCOM 0x5003A "00000000_00000000" 64
+#Cumulus/Nimbus
+if ($hb_mode == 1) {
# Set the Nest PLL Bucket ID to 5 in the 4th byte of Mbox Scratch Reg 4
($hb_masterproc_cecchip).invoke parallel_store SCOM 0x5003B "00000005_00000000" 64
($hb_masterproc_cecchip).invoke parallel_store FSIMBOX 0x01 "80000000" 32
($hb_masterproc_cecchip).invoke parallel_store FSIMBOX 0x08 "00080000" 32
+} else { #Axone
+ # Set the Nest PLL Bucket ID to 3 in the 4th byte of Mbox Scratch Reg 4
+ ($hb_masterproc_cecchip).invoke parallel_store SCOM 0x5003B "00000003_00000000" 64
+ ($hb_masterproc_cecchip).invoke parallel_store FSIMBOX 0x01 "80000000" 32
+ ($hb_masterproc_cecchip).invoke parallel_store FSIMBOX 0x08 "00080000" 32
}
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