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author | Jacob Harvey <jlharvey@us.ibm.com> | 2017-03-07 11:43:00 -0600 |
---|---|---|
committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-03-14 22:40:31 -0400 |
commit | 519fbef6dcba4ed662366d7dd9f8c8ae43ba8e02 (patch) | |
tree | c91d414dec013621522b18d958fc256a73b1130a | |
parent | 50b826da8783a89248d7dbc5816c5aee6e6fd28b (diff) | |
download | talos-hostboot-519fbef6dcba4ed662366d7dd9f8c8ae43ba8e02.tar.gz talos-hostboot-519fbef6dcba4ed662366d7dd9f8c8ae43ba8e02.zip |
Change accesses to IS_SIM to use mss accessor
Change-Id: Ib9c6b7a1f3cc69894f16ef6fa642261abd7e2dff
Original-Change-Id: Iafcaddbca510c29fb4a0289490b90b539dde2b13
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37610
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37883
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H | 12 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C | 6 |
2 files changed, 9 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H index 8fd85c24b..022695456 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H @@ -296,17 +296,17 @@ inline bool chip_ec_feature_skip_hw_vref_cal(const fapi2::Target<T>& i_target) const auto l_chip = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(i_target); uint8_t l_chip_check = 0; uint8_t l_skip_check = 0; - uint8_t is_sim = 0; + uint8_t l_sim = 0; FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_MSS_CHECK_DISABLE_HW_VREF_CAL, l_chip, l_chip_check) ); FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SKIP_HW_VREF_CAL, l_chip, l_skip_check) ); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), is_sim) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_sim) ); FAPI_DBG("Values of the attributes for HW VREF cal skip chip: %d skip: %d", l_chip_check, l_skip_check); // Chip check is required && we're in the HW sub-revision where the skip is required - then set a skip value // Skips if we are in sim mode - VREF cal takes too long for simulation - return is_sim || ((l_chip_check != 0) && (l_skip_check != 0)); + return l_sim || ((l_chip_check != 0) && (l_skip_check != 0)); fapi_try_exit: FAPI_ERR("failed accessing ATTR_SKIP_HW_VREF_CAL or ATTR_CHIP_EC_FEATURE_MSS_CHECK_DISABLE_HW_VREF_CAL: 0x%lx (target: %s)", @@ -350,17 +350,17 @@ inline bool chip_ec_feature_skip_rd_vref_vrefsense_override(const fapi2::Target< const auto l_chip = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(i_target); uint8_t l_chip_check = 0; uint8_t l_skip_check = 0; - uint8_t is_sim = 0; + uint8_t l_sim = 0; FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_MSS_CHECK_DIABLE_RD_VREF_CAL_VREFSENSE, l_chip, l_chip_check) ); FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SKIP_RD_VREF_VREFSENSE_OVERRIDE, l_chip, l_skip_check) ); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), is_sim) ); + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), l_sim) ); FAPI_DBG("Values of the attributes VREFSENSE chip: %d skip: %d", l_chip_check, l_skip_check); // Chip check is required && we're in the HW sub-revision where the skip is required - then set a skip value // Skips if we are in sim mode - VREF cal takes too long for simulation - return is_sim || ((l_chip_check != 0) && (l_skip_check != 0)); + return l_sim || ((l_chip_check != 0) && (l_skip_check != 0)); fapi_try_exit: FAPI_ERR("failed accessing ATTR_SKIP_RD_VREF_VREFSENSE_OVERRIDE or ATTR_CHIP_EC_FEATURE_MSS_CHECK_DIABLE_RD_VREF_CAL_VREFSENSE: 0x%lx (target: %s)", diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C index 0bdb4de8f..8814f29d9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C @@ -68,8 +68,8 @@ extern "C" return fapi2::FAPI2_RC_SUCCESS; } - uint8_t is_sim = false; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, fapi2::Target<TARGET_TYPE_SYSTEM>(), is_sim) ); + uint8_t l_sim = false; + FAPI_TRY( mss::is_simulation( l_sim) ); // Read the bad_dq_bitmap attribute and place corresponding symbol and chip marks for (const auto& l_mca : mss::find_targets<TARGET_TYPE_MCA>(i_target)) @@ -125,7 +125,7 @@ extern "C" // If we're in the sim, we want to poll for the FIR bit. I don't think this ever really happens // unless we're expressly testing this API. - if (is_sim) + if (l_sim) { // Poll for the fir bit. We expect this to be set ... fapi2::buffer<uint64_t> l_status; |