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author | Richard J. Knight <rjknight@us.ibm.com> | 2015-06-19 06:06:50 -0500 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-07-13 14:52:09 -0500 |
commit | 4f9645ad560101c0bbe2abeb034e29e192ed90f2 (patch) | |
tree | 1d41a823f573cbd74a48057c82fdcc6682774bd8 | |
parent | a9d99ed3f4efd773309cc2a8f9a9cd521ce828e4 (diff) | |
download | talos-hostboot-4f9645ad560101c0bbe2abeb034e29e192ed90f2.tar.gz talos-hostboot-4f9645ad560101c0bbe2abeb034e29e192ed90f2.zip |
SW309605: MPV:STC830:Brazos:Single node server fails to IPL with defective PCI o
Change-Id: I165dbaeabec1df86520a90fea4540d422e91b772
CQ:SW309605
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18465
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Tested-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18619
Tested-by: Jenkins Server
Tested-by: Jenkins OP Build CI
Tested-by: Jenkins OP HW
Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
-rw-r--r-- | src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml | 87 |
1 files changed, 73 insertions, 14 deletions
diff --git a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml index 8d2c6fa39..db6e1782c 100644 --- a/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml +++ b/src/usr/hwpf/hwp/nest_chiplets/proc_a_x_pci_dmi_pll_setup_errors.xml @@ -5,7 +5,9 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- COPYRIGHT International Business Machines Corp. 2012,2014 --> +<!-- Contributors Listed Below - COPYRIGHT 2012,2015 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> <!-- --> <!-- Licensed under the Apache License, Version 2.0 (the "License"); --> <!-- you may not use this file except in compliance with the License. --> @@ -20,11 +22,76 @@ <!-- permissions and limitations under the License. --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<!-- $Id: proc_a_x_pci_dmi_pll_setup_errors.xml,v 1.7 2014/02/04 18:55:02 mfred Exp $ --> -<!-- Halt codes for proc_a_x_pci_dmi_pll_setup --> +<!-- $Id: proc_a_x_pci_dmi_pll_setup_errors.xml,v 1.10 2015/06/01 01:54:08 rjknight Exp $ --> +<!-- Halt codes for proc_a_x_pci_dmi_pll_setup --> <hwpErrors> <!-- ******************************************************************** --> <hwpError> + <rc>RC_P8_PLL_UTILS_SBE_STOPPED</rc> + <ffdc>TARGET</ffdc> + <ffdc>SBE_CONTROL</ffdc> + <description>SBE is not running, unable to service scan request.</description> + <collectRegisterFfdc> + <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id> + <id>REG_FFDC_PROC_SBE_REGISTERS</id> + <target>TARGET</target> + </collectRegisterFfdc> + <deconfigure> + <target>TARGET</target> + </deconfigure> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P8_PLL_UTILS_SBE_TIMEOUT_ERROR</rc> + <ffdc>TARGET</ffdc> + <ffdc>POLL_COUNT</ffdc> + <ffdc>SBE_VITAL</ffdc> + <description>After requesting SBE scan operation, timed out waiting for SBE to attain ready state.</description> + <collectRegisterFfdc> + <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id> + <id>REG_FFDC_PROC_SBE_REGISTERS</id> + <target>TARGET</target> + </collectRegisterFfdc> + <deconfigure> + <target>TARGET</target> + </deconfigure> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P8_PLL_UTILS_SBE_SCAN_ERROR</rc> + <ffdc>TARGET</ffdc> + <ffdc>PLL_RING_ADDR</ffdc> + <ffdc>PLL_RING_OP</ffdc> + <ffdc>PLL_BUS_ID</ffdc> + <ffdc>MBOX1_DATA</ffdc> + <description>SBE scan service indicated scan failure.</description> + <collectRegisterFfdc> + <id>REG_FFDC_PROC_STATUS_AND_SBE_VITAL_REGISTERS</id> + <id>REG_FFDC_PROC_SBE_REGISTERS</id> + <target>TARGET</target> + </collectRegisterFfdc> + <deconfigure> + <target>TARGET</target> + </deconfigure> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_P8_PLL_UTILS_INVALID_OPERATION</rc> + <ffdc>TARGET</ffdc> + <ffdc>PLL_RING_ADDR</ffdc> + <ffdc>PLL_RING_OP</ffdc> + <ffdc>PLL_BUS_ID</ffdc> + <ffdc>INVALID_RING_ADDRESS</ffdc> + <ffdc>INVALID_RING_OP</ffdc> + <ffdc>INVALID_BUS_ID</ffdc> + <description>Invalid PLL configuration action requested.</description> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> <rc>RC_PROC_A_X_PCI_DMI_PLL_SETUP_ABUS_PLL_NO_LOCK</rc> <ffdc>LOCK_STATUS</ffdc> <description>A_Bus PLL failed to lock.</description> @@ -40,7 +107,7 @@ <priority>HIGH</priority> </callout> <callout> - <target>CHIP_IN_ERROR</target> + <target>CHIP_IN_ERROR</target> <priority>MEDIUM</priority> </callout> <callout> @@ -74,7 +141,7 @@ <priority>HIGH</priority> </callout> <callout> - <target>CHIP_IN_ERROR</target> + <target>CHIP_IN_ERROR</target> <priority>MEDIUM</priority> </callout> <callout> @@ -108,20 +175,12 @@ <priority>HIGH</priority> </callout> <callout> - <target>CHIP_IN_ERROR</target> + <target>CHIP_IN_ERROR</target> <priority>MEDIUM</priority> </callout> <callout> <procedure>CODE </procedure> <priority>LOW</priority> </callout> - <!-- Deconfigure CHIP_IN_ERROR --> - <deconfigure> - <target>CHIP_IN_ERROR</target> - </deconfigure> - <!-- Create GARD record for CHIP_IN_ERROR --> - <gard> - <target>CHIP_IN_ERROR</target> - </gard> </hwpError> </hwpErrors> |