L3 updates -- p9_build_smp, p9_fbc_utils

p9_build_smp:
  constrain FFDC collection at 16 chips (current max size for P9 based systems)
  scrub node references, replace with group
  clarify X link requirements based on pump mode
  review and complete callouts

p9_fbc_utils:
  add feature attribute to support pb_init sampling on NDD2+
  replace locally defined bit constants with SCOM header file constants

Change-Id: Ib1f71488ffd07580a647709d9227112f7d73384f
CQ: HW328175
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40308
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40311
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

12 files changed, 258 insertions, 204 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
index 987467d4a..e8cfc4468 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -29,7 +29,7 @@
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
 /// *HWP Consumed by: HB,FSP
 ///
 
@@ -93,7 +93,8 @@ p9_build_smp_process_chip(fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
              "Error from getScom (PU_PB_CENT_SM0_PB_CENT_HP_MODE_CURR)");
     io_smp_chip.master_chip_group_curr =
         l_hp_mode_curr.getBit<PU_PB_CENT_SM0_PB_CENT_HP_MODE_CURR_CFG_CHG_RATE_GP_MASTER>();
-    io_smp_chip.master_chip_sys_curr = l_hp_mode_curr.getBit<PU_PB_CENT_SM0_PB_CENT_HP_MODE_CURR_CFG_MASTER_CHIP>();
+    io_smp_chip.master_chip_sys_curr =
+        l_hp_mode_curr.getBit<PU_PB_CENT_SM0_PB_CENT_HP_MODE_CURR_CFG_MASTER_CHIP>();
     FAPI_DBG("   Master chip GROUP CURR = %d",
              io_smp_chip.master_chip_group_curr);
     FAPI_DBG("   Master chip SYS CURR = %d",
@@ -131,9 +132,9 @@ p9_build_smp_process_chip(fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
         // this chip will not be quiesced, to enable switch AB
         io_smp_chip.issue_quiesce_next = false;
 
-        // in both activation scenarios, we expect that:
-        //  - the newly designated master is currently configured
-        //    as a master within the scope of its current enclosing fabric
+        // in both activation scenarios, we expect that
+        // the newly designated master is currently configured
+        // as a master within the scope of its current enclosing fabric
         if (!io_smp_chip.master_chip_sys_curr)
         {
             l_err = true;
@@ -166,6 +167,8 @@ p9_build_smp_process_chip(fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
                 fapi2::P9_BUILD_SMP_MASTER_DESIGNATION_ERR()
                 .set_TARGET(i_target)
                 .set_OP(i_op)
+                .set_GROUP_ID(io_smp_chip.group_id)
+                .set_CHIP_ID(io_smp_chip.chip_id)
                 .set_MASTER_CHIP_SYS_CURR(io_smp_chip.master_chip_sys_curr)
                 .set_MASTER_CHIP_GROUP_CURR(io_smp_chip.master_chip_group_curr)
                 .set_MASTER_CHIP_SYS_NEXT(io_smp_chip.master_chip_sys_next)
@@ -260,7 +263,7 @@ p9_build_smp_insert_chip(fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
                 .set_TARGET2(*(p_iter->second.target))
                 .set_GROUP_ID(l_group_id)
                 .set_CHIP_ID(l_chip_id),
-                "Duplicate fabric groupID/chipID found");
+                "Multiple chips found with the same fabric group ID / chip ID attribute values");
 
     // process/fill chip data structure
     FAPI_TRY(p9_build_smp_process_chip(i_target,
@@ -322,7 +325,7 @@ fapi2::ReturnCode p9_build_smp_insert_chips(
             // ensure that we haven't already designated one
             FAPI_ASSERT(!l_master_chip_sys_next_found,
                         fapi2::P9_BUILD_SMP_MULTIPLE_MASTER_DESIGNATION_ERR()
-                        .set_TARGET(*l_iter)
+                        .set_MASTER_CHIP_SYS_NEXT_TARGET(i_master_chip_sys_next)
                         .set_OP(i_op),
                         "Muliple chips found in input vector which match target designated as master");
             l_master_chip_sys_next_found = true;
@@ -333,7 +336,7 @@ fapi2::ReturnCode p9_build_smp_insert_chips(
                                           i_op,
                                           io_smp,
                                           l_group_id),
-                 "Error from p9_buil_smp_insert_chip");
+                 "Error from p9_build_smp_insert_chip");
 
         if (l_master_chip_sys_next)
         {
@@ -343,9 +346,18 @@ fapi2::ReturnCode p9_build_smp_insert_chips(
 
     // ensure that new system master was designated
     FAPI_ASSERT(l_master_chip_sys_next_found,
-                fapi2::P9_BUILD_SMP_NO_MASTER_SPECIFIED_ERR()
+                fapi2::P9_BUILD_SMP_NO_MASTER_DESIGNATION_ERR()
+                .set_MASTER_CHIP_SYS_NEXT_TARGET(i_master_chip_sys_next)
                 .set_OP(i_op),
-                "No system master specified/found");
+                "No chips found in input vector which match target designated as master");
+
+    // check that SMP size does not exceed maximum number of chips supported
+    FAPI_ASSERT(i_chips.size() < P9_BUILD_SMP_MAX_SIZE,
+                fapi2::P9_BUILD_SMP_MAX_SIZE_ERR()
+                .set_SIZE(i_chips.size())
+                .set_MAX_SIZE(P9_BUILD_SMP_MAX_SIZE)
+                .set_OP(i_op),
+                "Number of chips found in input vector exceeds supported SMP size");
 
     // based on master designation, and operation phase,
     // determine whether each chip will be quiesced as a result
@@ -381,18 +393,20 @@ fapi_try_exit:
 ///
 /// @brief Check validity of SMP topology
 ///
+/// @param[in] i_op    Enumerated type representing SMP build phase (HB or FSP)
 /// @param[in] i_smp   Fully specified structure encapsulating SMP
 ///
 /// @return FAPI2_RC_SUCCESS if success, else error code.
 ///
 fapi2::ReturnCode
-p9_build_smp_check_topology(p9_build_smp_system& i_smp)
+p9_build_smp_check_topology(const p9_build_smp_operation i_op,
+                            p9_build_smp_system& i_smp)
 {
     // check that fabric topology is logically valid
     // 1) in a given group, all chips are connected to every other
-    //    chip in the group, by an X bus
+    //    chip in the group, by an X bus (if pump mode = chip_is_node)
     // 2) each chip is connected to its partner chip (with same chip id)
-    //    in every other group, by an A bus (or X bus if pump mode = chip_is_group)
+    //    in every other group, by an A bus or X bus (if pump mode = chip_is_group)
 
     fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
     fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_pump_mode;
@@ -451,8 +465,8 @@ p9_build_smp_check_topology(p9_build_smp_system& i_smp)
             FAPI_TRY(l_connected_chip_ids.setBit(p_iter->second.chip_id),
                      "Error from setBit (l_connected_chip_ids)");
 
-            // process links, mark reachable group/chip IDs
-            FAPI_INF("Processing links for g%d:p%d", g_iter->first, p_iter->first);
+            // process X links, mark reachable group/chip IDs
+            FAPI_INF("Processing X links for g%d:p%d", g_iter->first, p_iter->first);
             FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG, *(p_iter->second.target), l_x_en),
                      "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG)");
 
@@ -477,6 +491,8 @@ p9_build_smp_check_topology(p9_build_smp_system& i_smp)
 
             }
 
+            // process A links, mark reachable group/chip IDs
+            FAPI_INF("Processing A links for g%d:p%d", g_iter->first, p_iter->first);
             FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG, *(p_iter->second.target), l_a_en),
                      "Error from FAPI_ATTR_GET (ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG)");
 
@@ -511,20 +527,25 @@ p9_build_smp_check_topology(p9_build_smp_system& i_smp)
 
                 if (!intergroup_set_match)
                 {
-                    FAPI_ERR("Target %s is not fully connected (A) to all other groups",
+                    FAPI_ERR("Target %s is not fully connected (X/A) to all other groups in the system",
                              l_target_str);
                 }
 
                 FAPI_ASSERT(false,
                             fapi2::P9_BUILD_SMP_INVALID_TOPOLOGY()
                             .set_TARGET(*(p_iter->second.target))
-                            .set_A_CONNECTIONS_OK(intergroup_set_match)
-                            .set_A_CONNECTED_GROUP_IDS(l_connected_group_ids)
-                            .set_X_CONNECTIONS_OK(intragroup_set_match)
-                            .set_X_CONNECTED_CHIP_IDS(l_connected_chip_ids),
+                            .set_OP(i_op)
+                            .set_GROUP_ID(p_iter->second.group_id)
+                            .set_CHIP_ID(p_iter->second.chip_id)
+                            .set_INTERGROUP_CONNECTIONS_OK(intergroup_set_match)
+                            .set_CONNECTED_GROUP_IDS(l_connected_group_ids)
+                            .set_GROUP_IDS_IN_SYSTEM(l_group_ids_in_system)
+                            .set_INTRAGROUP_CONNECTIONS_OK(intragroup_set_match)
+                            .set_CONNECTED_CHIP_IDS(l_connected_chip_ids)
+                            .set_CHIP_IDS_IN_GROUPS(l_chip_ids_in_groups)
+                            .set_FBC_PUMP_MODE(l_pump_mode),
                             "Invalid fabric topology detected");
             }
-
         }
     }
 
@@ -553,7 +574,8 @@ fapi2::ReturnCode p9_build_smp(std::vector<fapi2::Target<fapi2::TARGET_TYPE_PROC
              "Error from p9_build_smp_insert_chips");
 
     // check topology before continuing
-    FAPI_TRY(p9_build_smp_check_topology(l_smp),
+    FAPI_TRY(p9_build_smp_check_topology(i_op,
+                                         l_smp),
              "Error from p9_build_smp_check_topology");
 
     // activate new SMP configuration
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.H b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.H
index aa5b02935..b9a49372b 100755
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -49,7 +49,7 @@
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
 /// *HWP Consumed by: HB,FSP
 ///
 
@@ -65,6 +65,11 @@
 
 
 //------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+const uint8_t P9_BUILD_SMP_MAX_SIZE = 16;
+
+//------------------------------------------------------------------------------
 // Structure definitions
 //------------------------------------------------------------------------------
 
@@ -74,7 +79,7 @@ enum p9_build_smp_operation
     // used to initialize scope of HBI drawer
     // call from HB (switch C/D + A/B),
     SMP_ACTIVATE_PHASE1 = 1,
-    // used to stitch drawers/CCM
+    // used to stitch drawers
     // call from FSP (only switch A/B)
     SMP_ACTIVATE_PHASE2 = 2
 };
@@ -101,7 +106,7 @@ struct p9_build_smp_chip
     bool quiesced_next;
 };
 
-// Structure to represent properties for a single node in the SMP topology
+// Structure to represent properties for a single group in the SMP topology
 struct p9_build_smp_group
 {
     // chips which reside in this node
@@ -112,10 +117,10 @@ struct p9_build_smp_group
     uint8_t group_id;
 };
 
-// Structure to represent collection of nodes in SMP topology
+// Structure to represent collection of groups in SMP topology
 struct p9_build_smp_system
 {
-    // nodes which reside in this SMP
+    // groups which reside in this SMP
     std::map<uint8_t, p9_build_smp_group> groups;
 };
 
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.C b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.C
index d05e5bc9f..d88b39268 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.C
@@ -30,7 +30,7 @@
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
 /// *HWP Consumed by: HB,FSP
 ///
 
@@ -89,14 +89,11 @@ const uint32_t P9_BUILD_SMP_FFDC_REGS[P9_BUILD_SMP_FFDC_NUM_REGS] =
 ///
 /// @param[in] i_target                P9 target
 /// @param[in] i_smp                   Structure encapsulating SMP topology
-/// @param[in] i_dump_all_targets      Dump FFDC for all targets in SMP?
-///                                    true=yes; false=no (only for i_target)
 /// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
 ///
 fapi2::ReturnCode p9_build_smp_adu_check_status(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
-    p9_build_smp_system& i_smp,
-    const bool i_dump_all_targets)
+    p9_build_smp_system& i_smp)
 {
     FAPI_DBG("Start");
     fapi2::ReturnCode l_rc;
@@ -145,97 +142,72 @@ fapi2::ReturnCode p9_build_smp_adu_check_status(
     {
         fapi2::current_err = l_rc;
         // collect FFDC
-        std::vector<fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>*> l_targets_to_collect;
-        fapi2::buffer<uint64_t> l_scomData;
-        fapi2::variable_buffer l_group_ids;
-        fapi2::variable_buffer l_chip_ids;
-        fapi2::variable_buffer l_ffdc_reg_data[P9_BUILD_SMP_FFDC_NUM_REGS];
+        fapi2::variable_buffer l_chip_data_valid(8 * P9_BUILD_SMP_MAX_SIZE);
+        fapi2::variable_buffer l_group_ids(8 * P9_BUILD_SMP_MAX_SIZE);
+        fapi2::variable_buffer l_chip_ids(8 * P9_BUILD_SMP_MAX_SIZE);
+        fapi2::variable_buffer l_ffdc_addrs(64 * P9_BUILD_SMP_FFDC_NUM_REGS);
+        fapi2::variable_buffer l_ffdc_reg_data(64 * P9_BUILD_SMP_MAX_SIZE * P9_BUILD_SMP_FFDC_NUM_REGS);
+        uint8_t l_idx = 0;
+
+        // init buffers
+        l_chip_data_valid.flush<0>();
+        l_group_ids.flush<1>();
+        l_chip_ids.flush<1>();
+        l_ffdc_reg_data.flush<1>();
+
+        for (uint8_t jj = 0; jj < P9_BUILD_SMP_FFDC_NUM_REGS; jj++)
+        {
+            l_ffdc_addrs.set<uint64_t>(jj, P9_BUILD_SMP_FFDC_REGS[jj]);
+        }
 
-        // determine set of chips to collect
+        // extract FFDC data
         for (auto n_iter = i_smp.groups.begin();
              n_iter != i_smp.groups.end();
-             ++n_iter)
+             n_iter++)
         {
             for (auto p_iter = n_iter->second.chips.begin();
                  p_iter != n_iter->second.chips.end();
-                 ++p_iter)
+                 p_iter++)
             {
-                if (i_dump_all_targets ||
-                    (*(p_iter->second.target) == i_target))
+                // mark valid
+                (void) l_chip_data_valid.set<uint8_t>(l_idx, 0x1);
+                // log group/chip ID
+                (void) l_group_ids.set<uint8_t>(l_idx, n_iter->first);
+                (void) l_chip_ids.set<uint8_t>(l_idx, p_iter->first);
+
+                // collect SCOM data
+                for (uint8_t jj = 0; jj < P9_BUILD_SMP_FFDC_NUM_REGS; jj++)
                 {
-                    l_targets_to_collect.push_back(p_iter->second.target);
-                }
-            }
-        }
+                    fapi2::buffer<uint64_t> l_scom_data;
+                    fapi2::ReturnCode l_scom_rc;
+                    // discard bad SCOM return codes, mark data as all ones
+                    // and keep collecting
+                    l_scom_rc = fapi2::getScom(*(p_iter->second.target),
+                                               P9_BUILD_SMP_FFDC_REGS[jj],
+                                               l_scom_data);
+
+                    if (l_scom_rc)
+                    {
+                        l_scom_data.flush<1>();
+                    }
 
-        // size the FFDC buffers
-        l_group_ids.resize(8 * l_targets_to_collect.size());
-        l_chip_ids.resize(8 * l_targets_to_collect.size());
+                    (void) l_ffdc_reg_data.set<uint64_t>((P9_BUILD_SMP_FFDC_NUM_REGS * l_idx) + jj,
+                                                         l_scom_data());
+                }
 
-        for (uint8_t i = 0; i < P9_BUILD_SMP_FFDC_NUM_REGS; i++)
-        {
-            l_ffdc_reg_data[i].resize(64 * l_targets_to_collect.size());
+                l_idx++;
+            }
         }
 
-        // extract FFDC data
-//        for (std::vector<fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>*>::iterator t_iter = l_targets_to_collect.begin();
-//             t_iter != l_targets_to_collect.end();
-//             t_iter++)
-//        {
-//            // log groupd/chip ID
-//            for (auto n_iter = i_smp.groups.begin();
-//                 n_iter != i_smp.groups.end();
-//                 n_iter++)
-//            {
-//                for (auto p_iter = n_iter->second.chips.begin();
-//                     p_iter != n_iter->second.chips.end();
-//                     p_iter++)
-//                {
-//                    if (p_iter->second.target == *t_iter)
-//                    {
-//                        (void) l_group_ids.set<uint8_t>(t_iter - l_targets_to_collect.begin(), n_iter->first);
-//                        (void) l_chip_ids.set<uint8_t>(t_iter - l_targets_to_collect.begin(), p_iter->first);
-//                    }
-//                }
-//            }
-//
-//            // collect SCOM data
-//            for (uint8_t i = 0; i < P9_BUILD_SMP_FFDC_NUM_REGS; i++)
-//            {
-//                fapi2::buffer<uint64_t> l_scom_data;
-//                fapi2::ReturnCode l_rc = fapi2::getScom(*(*t_iter), P9_BUILD_SMP_FFDC_REGS[i], l_scom_data);
-//
-//                if (l_rc)
-//                {
-//                    l_scom_data.flush<1>();
-//                }
-//
-//                (void) l_ffdc_reg_data[i].set<uint64_t>(t_iter - l_targets_to_collect.begin(), l_scom_data());
-//            }
-//        }
-
         FAPI_ASSERT(false,
                     fapi2::P9_BUILD_SMP_ADU_STATUS_MISMATCH_ERR()
                     .set_TARGET(i_target)
                     .set_ADU_NUM_POLLS(l_num_polls)
-                    .set_NUM_CHIPS(l_targets_to_collect.size())
+                    .set_CHIP_DATA_VALID(&l_chip_data_valid)
                     .set_GROUP_IDS(l_group_ids)
                     .set_CHIP_IDS(l_chip_ids)
-                    .set_PB_CENT_MODE(l_ffdc_reg_data[0])
-                    .set_PB_CENT_HP_MODE_CURR(l_ffdc_reg_data[1])
-                    .set_PB_CENT_HP_MODE_NEXT(l_ffdc_reg_data[2])
-                    .set_PB_CENT_HPX_MODE_CURR(l_ffdc_reg_data[3])
-                    .set_PB_CENT_HPX_MODE_NEXT(l_ffdc_reg_data[4])
-                    .set_PB_CENT_HPA_MODE_CURR(l_ffdc_reg_data[5])
-                    .set_PB_CENT_HPA_MODE_NEXT(l_ffdc_reg_data[6])
-                    .set_XB_CPLT_CONF1(l_ffdc_reg_data[7])
-                    .set_PB_IOE_FIR_REG(l_ffdc_reg_data[8])
-                    .set_OB0_CPLT_CONF1(l_ffdc_reg_data[9])
-                    .set_OB1_CPLT_CONF1(l_ffdc_reg_data[10])
-                    .set_OB2_CPLT_CONF1(l_ffdc_reg_data[11])
-                    .set_OB3_CPLT_CONF1(l_ffdc_reg_data[12])
-                    .set_IOE_PB_IOO_FIR_REG(l_ffdc_reg_data[13])
-                    .set_ADU_SND_MODE_REG(l_ffdc_reg_data[14]),
+                    .set_FFDC_ADDRS(l_ffdc_addrs)
+                    .set_FFDC_REG_DATA(l_ffdc_reg_data),
                     "Status mismatch detected on ADU operation");
     }
 
@@ -428,8 +400,7 @@ fapi2::ReturnCode p9_build_smp_sequence_adu(p9_build_smp_system& i_smp,
                 // Check status
                 l_rc = p9_build_smp_adu_check_status(
                            *(p_iter->second.target),
-                           i_smp,
-                           (i_op == SMP_ACTIVATE_PHASE2));
+                           i_smp);
 
                 if (l_rc)
                 {
@@ -440,7 +411,7 @@ fapi2::ReturnCode p9_build_smp_sequence_adu(p9_build_smp_system& i_smp,
                 // workaround for HW397129 to re-enable fastpath for DD1
                 uint8_t l_hw397129_workaround;
                 FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW397129, *(p_iter->second.target), l_hw397129_workaround),
-                         "Error getting the ATTR_CHIP_EC_FEATURE_HW397129");
+                         "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_HW397129)");
 
                 if ((i_action == SWITCH_AB) && l_hw397129_workaround)
                 {
@@ -456,18 +427,17 @@ fapi2::ReturnCode p9_build_smp_sequence_adu(p9_build_smp_system& i_smp,
 
                     if (l_rc)
                     {
-                        FAPI_ERR("Error from p9_adu_coherent_setup_adu (op)");
+                        FAPI_ERR("Error from p9_adu_coherent_setup_adu (op, reinit)");
                         goto adu_reset_unlock;
                     }
 
                     // Check status
                     l_rc = p9_build_smp_adu_check_status(*(p_iter->second.target),
-                                                         i_smp,
-                                                         true);
+                                                         i_smp);
 
                     if (l_rc)
                     {
-                        FAPI_ERR("Error from p9_build_smp_adu_check_status (op)");
+                        FAPI_ERR("Error from p9_build_smp_adu_check_status (op, reinit)");
                         goto adu_reset_unlock;
                     }
                 }
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.H b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.H
index 53cf5825d..3086e75ee 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_adu.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -30,7 +30,7 @@
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
 /// *HWP Consumed by: HB,FSP
 ///
 
@@ -43,24 +43,24 @@
 #include <p9_build_smp.H>
 
 
-extern "C" {
-
 //------------------------------------------------------------------------------
 // Constant definitions
 //------------------------------------------------------------------------------
 
-    enum p9_build_smp_adu_action
-    {
-        SWITCH_AB = 1,
-        SWITCH_CD = 2,
-        QUIESCE   = 4
-    };
+enum p9_build_smp_adu_action
+{
+    SWITCH_AB = 1,
+    SWITCH_CD = 2,
+    QUIESCE   = 4
+};
 
 
 //------------------------------------------------------------------------------
 // Function prototypes
 //------------------------------------------------------------------------------
 
+extern "C" {
+
 ///
 /// @brief Perform fabric quiesce/switch operation via ADU
 ///
@@ -74,7 +74,6 @@ extern "C" {
             const p9_build_smp_operation i_op,
             const p9_build_smp_adu_action i_action);
 
-
 } // extern "C"
 
 #endif // _P9_BUILD_SMP_ADU_H_
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.C b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.C
index 1bb0ca923..8882e400a 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -24,13 +24,12 @@
 /* IBM_PROLOG_END_TAG                                                     */
 ///
 /// @file p9_build_smp_fbc_ab.C
-///
 /// @brief Fabric configuration (hotplug, AB) functions.
 ///
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
 /// *HWP Consumed by: HB,FSP
 ///
 
@@ -50,7 +49,7 @@
 // PB shadow register constant definition
 const uint8_t P9_BUILD_SMP_NUM_SHADOWS = 3;
 
-// HP
+// HP (HotPlug Mode Register)
 const uint64_t PB_HP_MODE_CURR_SHADOWS[P9_BUILD_SMP_NUM_SHADOWS] =
 {
     PU_PB_WEST_SM0_PB_WEST_HP_MODE_CURR,
@@ -65,7 +64,7 @@ const uint64_t PB_HP_MODE_NEXT_SHADOWS[P9_BUILD_SMP_NUM_SHADOWS] =
     PU_PB_EAST_HP_MODE_NEXT
 };
 
-// HPX
+// HPX (Hotplug Mode Register Extension)
 const uint64_t PB_HPX_MODE_CURR_SHADOWS[P9_BUILD_SMP_NUM_SHADOWS] =
 {
     PU_PB_WEST_SM0_PB_WEST_HPX_MODE_CURR,
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.H b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.H
index f061b6e96..d8e85c83f 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_ab.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -29,7 +29,7 @@
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
 /// *HWP Consumed by: HB,FSP
 ///
 
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.C b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.C
index 65339b0b6..1406e92e6 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -24,12 +24,13 @@
 /* IBM_PROLOG_END_TAG                                                     */
 ///
 /// @file p9_build_smp_fbc_cd.C
-/// @brief  Fabric configuration (hotplug, CD) functions
+/// @brief Fabric configuration (hotplug, CD) functions
 ///
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
+/// *HWP Consumed by: HB,FSP
 ///
 
 //------------------------------------------------------------------------------
@@ -45,6 +46,7 @@
 // Function definitions
 //------------------------------------------------------------------------------
 
+
 // NOTE: see comments above function prototype in header
 fapi2::ReturnCode p9_build_smp_set_fbc_cd(p9_build_smp_system& i_smp)
 {
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.H b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.H
index 71155daaf..3d2ffced9 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp_fbc_cd.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -24,12 +24,13 @@
 /* IBM_PROLOG_END_TAG                                                     */
 ///
 /// @file p9_build_smp_fbc_cd.H
-/// @brief  Fabric configuration (hotplug, CD) functions
+/// @brief Fabric configuration (hotplug, CD) functions
 ///
 /// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 /// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 /// *HWP Team: Nest
-/// *HWP Level: 2
+/// *HWP Level: 3
+/// *HWP Consumed by: HB,FSP
 ///
 
 #ifndef _P9_BUILD_SMP_FBC_CD_H_
@@ -51,7 +52,7 @@ extern "C"
 ///
 /// @brief Program fabric configuration register (hotplug, C/D set)
 ///
-/// @param[in]   i_smp     Structure encapsulating SMP topology
+/// @param[in] i_smp     Structure encapsulating SMP topology
 ///
 /// @return fapi2:ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
 ///
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
index af4df9488..2d5a427c9 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.C
@@ -39,7 +39,7 @@
 // *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 // *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 // *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
 // *HWP Consumed by: SBE,HB,FSP
 //
 
@@ -48,39 +48,34 @@
 //------------------------------------------------------------------------------
 #include <p9_fbc_utils.H>
 #include <p9_misc_scom_addresses.H>
+#include <p9_misc_scom_addresses_fld.H>
 
 
 //------------------------------------------------------------------------------
 // Constant definitions
 //------------------------------------------------------------------------------
 
-// ADU PMisc Register field/bit definitions
-const uint32_t ALTD_SND_MODE_DISABLE_CHECKSTOP_BIT = 19;
-const uint32_t ALTD_SND_MODE_MANUAL_CLR_PB_STOP_BIT = 21;
-const uint32_t ALTD_SND_MODE_PB_STOP_BIT = 22;
-
-// FBC Mode Register field/bit definitions
-const uint32_t PU_FBC_MODE_PB_INITIALIZED_BIT = 0;
-
 // FBC base address determination constants
 // system ID (large system)
 const uint8_t FABRIC_ADDR_LS_SYSTEM_ID_START_BIT = 8;
 const uint8_t FABRIC_ADDR_LS_SYSTEM_ID_END_BIT = 12;
+// msel bits (large & small system)
+const uint8_t FABRIC_ADDR_MSEL_START_BIT = 13;
+const uint8_t FABRIC_ADDR_MSEL_END_BIT = 14;
 // group ID (large system)
 const uint8_t FABRIC_ADDR_LS_GROUP_ID_START_BIT = 15;
 const uint8_t FABRIC_ADDR_LS_GROUP_ID_END_BIT = 18;
 // chip ID (large system)
 const uint8_t FABRIC_ADDR_LS_CHIP_ID_START_BIT = 19;
 const uint8_t FABRIC_ADDR_LS_CHIP_ID_END_BIT = 21;
-// msel bits (large & small system)
-const uint8_t FABRIC_ADDR_MSEL_START_BIT = 13;
-const uint8_t FABRIC_ADDR_MSEL_END_BIT = 14;
 
 
 //------------------------------------------------------------------------------
 // Function definitions
 //------------------------------------------------------------------------------
 
+
+// NOTE: see comments above function prototype in header
 fapi2::ReturnCode p9_fbc_utils_get_fbc_state(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
     bool& o_is_initialized,
@@ -88,25 +83,34 @@ fapi2::ReturnCode p9_fbc_utils_get_fbc_state(
 {
     FAPI_DBG("Start");
 
-    // TODO: HW328175
-    // fapi2::buffer<uint64_t> l_fbc_mode_data;
-    // FAPI_TRY(fapi2::getScom(i_target, PU_FBC_MODE_REG, l_fbc_mode_data),
-    //          "Error reading FBC Mode Register");
-    // // fabric is initialized if PB_INITIALIZED bit is one/set
-    // o_is_initialized = l_fbc_mode_data.getBit<PU_FBC_MODE_PB_INITIALIZED_BIT>();
+    fapi2::ATTR_CHIP_EC_FEATURE_HW328175_Type l_hw328175;
+    fapi2::buffer<uint64_t> l_fbc_mode_data;
+    fapi2::buffer<uint64_t> l_pmisc_mode_data;
 
-    // currently, sampling FBC init from PB Mode register is unreliable
-    // as init can drop perodically at runtime (based on legacy sleep backoff)
-    // until this issue is fixed, just return true to caller
-    o_is_initialized = true;
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW328175, i_target, l_hw328175),
+             "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_HW328175");
+
+    if (l_hw328175)
+    {
+        // sampling FBC init from PB Mode register is unreliable
+        // as init can drop perodically at runtime (based on legacy sleep backoff),
+        // just return true to caller
+        o_is_initialized = true;
+    }
+    else
+    {
+        FAPI_TRY(fapi2::getScom(i_target, PU_PB_CENT_SM0_PB_CENT_MODE, l_fbc_mode_data),
+                 "Error reading FBC Mode Register");
+        // fabric is initialized if PB_INITIALIZED bit is one/set
+        o_is_initialized = l_fbc_mode_data.getBit<PU_PB_CENT_SM0_PB_CENT_MODE_PB_CENT_PBIXXX_INIT>();
+    }
 
     // read ADU PMisc Mode Register state
-    fapi2::buffer<uint64_t> l_pmisc_mode_data;
     FAPI_TRY(fapi2::getScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
              "Error reading ADU PMisc Mode register");
 
     // fabric is running if FBC_STOP bit is zero/clear
-    o_is_running = !(l_pmisc_mode_data.getBit<ALTD_SND_MODE_PB_STOP_BIT>());
+    o_is_running = !(l_pmisc_mode_data.getBit<PU_SND_MODE_REG_PB_STOP>());
 
 fapi_try_exit:
     FAPI_DBG("End");
@@ -114,6 +118,7 @@ fapi_try_exit:
 }
 
 
+// NOTE: see comments above function prototype in header
 fapi2::ReturnCode p9_fbc_utils_override_fbc_stop(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
 {
@@ -125,12 +130,12 @@ fapi2::ReturnCode p9_fbc_utils_override_fbc_stop(
              "Error reading ADU PMisc Mode register");
 
     // set bit to disable checkstop forwarding and write back
-    l_pmisc_mode_data.setBit<ALTD_SND_MODE_DISABLE_CHECKSTOP_BIT>();
+    l_pmisc_mode_data.setBit<PU_SND_MODE_REG_DISABLE_CHECKSTOP>();
     FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
              "Error writing ADU PMisc Mode register to disable checkstop forwarding to FBC");
 
     // set bit to manually clear stop control and write back
-    l_pmisc_mode_data.setBit<ALTD_SND_MODE_MANUAL_CLR_PB_STOP_BIT>();
+    l_pmisc_mode_data.setBit<PU_SND_MODE_REG_MANUAL_CLR_PB_STOP>();
     FAPI_TRY(fapi2::putScom(i_target, PU_SND_MODE_REG, l_pmisc_mode_data),
              "Error writing ADU PMisc Mode register to manually clear FBC stop control");
 
@@ -140,6 +145,7 @@ fapi_try_exit:
 }
 
 
+// NOTE: see comments above function prototype in header
 fapi2::ReturnCode p9_fbc_utils_get_chip_base_address(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
     const p9_fbc_utils_addr_mode_t i_addr_mode,
@@ -155,7 +161,6 @@ fapi2::ReturnCode p9_fbc_utils_get_chip_base_address(
     fapi2::buffer<uint64_t> l_base_address;
     const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
 
-
     FAPI_DBG("Start");
 
     // retreive attributes which statically determine chips position in memory map
@@ -186,7 +191,7 @@ fapi2::ReturnCode p9_fbc_utils_get_chip_base_address(
              "Error from FAPI_ATTR_GET (ATTR_MEM_MIRROR_PLACEMENT_POLICY)");
 
     // apply system ID
-    // occupies one field for large system map (three fields for small system map)
+    // occupies one field for large system map
     l_base_address.insertFromRight < FABRIC_ADDR_LS_SYSTEM_ID_START_BIT,
                                    (FABRIC_ADDR_LS_SYSTEM_ID_END_BIT - FABRIC_ADDR_LS_SYSTEM_ID_START_BIT + 1) > (l_fabric_system_id);
 
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
index 23d1df7e9..a1dacf4cd 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H
@@ -34,7 +34,7 @@
 // *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
 // *HWP FW Owner: Thi Tran <thi@us.ibm.com>
 // *HWP Team: Nest
-// *HWP Level: 2
+// *HWP Level: 3
 // *HWP Consumed by: SBE,HB,FSP
 //
 
@@ -78,9 +78,9 @@ const uint64_t FABRIC_CACHELINE_SIZE = 0x80;
 /// @brief Read FBC/ADU registers to determine state of fabric init and stop
 /// control signals
 ///
-/// @param[in] i_target           Reference to processor chip target
-/// @param[out] o_is_initialized  State of fabric init signal
-/// @param[out] o_is_running      State of fabric pervasive stop control
+/// @param[in] i_target Reference to processor chip target
+/// @param[out] o_is_initialized State of fabric init signal
+/// @param[out] o_is_running State of fabric pervasive stop control
 /// @return fapi::ReturnCode, FAPI2_RC_SUCCESS if success, else error code.
 ///
 fapi2::ReturnCode p9_fbc_utils_get_fbc_state(
@@ -92,7 +92,7 @@ fapi2::ReturnCode p9_fbc_utils_get_fbc_state(
 /// @brief Use ADU pMisc Mode register to clear fabric stop signal, overriding
 /// a stop condition caused by a checkstop
 ///
-/// @param[in] i_target            Reference to processor chip target
+/// @param[in] i_target Reference to processor chip target
 /// @return fapi::ReturnCode, FAPI2_RC_SUCCESS if success, else error code.
 ///
 fapi2::ReturnCode p9_fbc_utils_override_fbc_stop(
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index a6cd0a5cc..e8d62c3c7 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -359,6 +359,24 @@
   </attribute>
   <!-- ******************************************************************** -->
   <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW328175</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+       HW328175 : PB mode register does not reflect steady-state value
+       of PB init
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
+  <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW367321</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_build_smp_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_build_smp_errors.xml
index fe58da716..d156a6260 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_build_smp_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_build_smp_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER HostBoot Project                                             -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2016                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2017                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -22,14 +22,17 @@
 <!-- permissions and limitations under the License.                         -->
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
-<!-- Error definitions for p9_build_smp HWP -->
 <hwpErrors>
   <!-- ******************************************************************** -->
   <hwpError>
     <rc>RC_P9_BUILD_SMP_MASTER_DESIGNATION_ERR</rc>
-    <description>Node or system master chip designation error.</description>
+    <description>
+      Node or system master chip designation error.
+    </description>
     <ffdc>TARGET</ffdc>
     <ffdc>OP</ffdc>
+    <ffdc>GROUP_ID</ffdc>
+    <ffdc>CHIP_ID</ffdc>
     <ffdc>MASTER_CHIP_SYS_CURR</ffdc>
     <ffdc>MASTER_CHIP_GROUP_CURR</ffdc>
     <ffdc>MASTER_CHIP_SYS_NEXT</ffdc>
@@ -42,7 +45,10 @@
   <!-- ******************************************************************** -->
   <hwpError>
     <rc>RC_P9_BUILD_SMP_GROUP_ADD_INTERNAL_ERR</rc>
-    <description>Internal Error.  Error encountered adding node to SMP structure.</description>
+    <description>
+      Internal program error.
+      SMP data structure map insert failed.
+    </description>
     <ffdc>TARGET</ffdc>
     <ffdc>GROUP_ID</ffdc>
     <callout>
@@ -53,7 +59,9 @@
   <!-- ******************************************************************** -->
   <hwpError>
     <rc>RC_P9_BUILD_SMP_DUPLICATE_FABRIC_ID_ERR</rc>
-    <description>Multiple chips found with identifcal fabric node/chip ID attribute values.</description>
+    <description>
+      Multiple chips found with identical fabric node/chip ID attribute values.
+    </description>
     <ffdc>TARGET1</ffdc>
     <ffdc>TARGET2</ffdc>
     <ffdc>GROUP_ID</ffdc>
@@ -66,8 +74,11 @@
   <!-- ******************************************************************** -->
   <hwpError>
     <rc>RC_P9_BUILD_SMP_MULTIPLE_MASTER_DESIGNATION_ERR</rc>
-    <description>Input parameter designating master matches more than one chip in HWP input targets.</description>
-    <ffdc>TARGET</ffdc>
+    <description>
+      Input parameter designating post-reconfiguration master chip
+      matches more than one chip in HWP input targets to process.
+    </description>
+    <ffdc>MASTER_CHIP_SYS_NEXT_TARGET</ffdc>
     <ffdc>OP</ffdc>
     <callout>
       <procedure>CODE</procedure>
@@ -76,8 +87,26 @@
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
-    <rc>RC_P9_BUILD_SMP_NO_MASTER_SPECIFIED_ERR</rc>
-    <description>Input parameters do not specify a new fabric system master.</description>
+    <rc>RC_P9_BUILD_SMP_NO_MASTER_DESIGNATION_ERR</rc>
+    <description>
+      Input parameter designating post-reconfiguration master chip
+      does not match any chips in HWP input targets to process.
+    </description>
+    <ffdc>MASTER_CHIP_SYS_NEXT_TARGET</ffdc>
+    <ffdc>OP</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+  </hwpError>
+  <!-- ******************************************************************** -->
+  <hwpError>
+    <rc>RC_P9_BUILD_SMP_MAX_SIZE_ERR</rc>
+    <description>
+      Number of chips in HWP input arguments exceeds supported SMP size
+    </description>
+    <ffdc>SIZE</ffdc>
+    <ffdc>MAX_SIZE</ffdc>
     <ffdc>OP</ffdc>
     <callout>
       <procedure>CODE</procedure>
@@ -87,12 +116,20 @@
   <!-- ******************************************************************** -->
   <hwpError>
     <rc>RC_P9_BUILD_SMP_INVALID_TOPOLOGY</rc>
-    <description>Invalid fabric topology specified by input parameters.</description>
+    <description>
+      Invalid fabric topology specified by input parameters.
+    </description>
     <ffdc>TARGET</ffdc>
-    <ffdc>A_CONNECTIONS_OK</ffdc>
-    <ffdc>A_CONNECTED_GROUP_IDS</ffdc>
-    <ffdc>X_CONNECTIONS_OK</ffdc>
-    <ffdc>X_CONNECTED_CHIP_IDS</ffdc>
+    <ffdc>OP</ffdc>
+    <ffdc>GROUP_ID</ffdc>
+    <ffdc>CHIP_ID</ffdc>
+    <ffdc>INTERGROUP_CONNECTIONS_OK</ffdc>
+    <ffdc>CONNECTED_GROUP_IDS</ffdc>
+    <ffdc>GROUP_IDS_IN_SYSTEM</ffdc>
+    <ffdc>INTRAGROUP_CONNECTIONS_OK</ffdc>
+    <ffdc>CONNECTED_CHIP_IDS</ffdc>
+    <ffdc>CHIP_IDS_IN_GROUPS</ffdc>
+    <ffdc>FBC_PUMP_MODE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
@@ -101,7 +138,10 @@
   <!-- ******************************************************************** -->
   <hwpError>
     <rc>RC_P9_BUILD_SMP_HOTPLUG_SHADOW_ERR</rc>
-    <description>Inconsistent state in hotplug (CURR) shadow copies.</description>
+    <description>
+      Fabric hotplug (CURR or NEXT) shadow register contents are not
+      equivalent.
+    </description>
     <ffdc>TARGET</ffdc>
     <ffdc>ADDRESS0</ffdc>
     <ffdc>ADDRESS1</ffdc>
@@ -126,27 +166,20 @@
   <!-- ******************************************************************** -->
   <hwpError>
     <rc>RC_P9_BUILD_SMP_ADU_STATUS_MISMATCH_ERR</rc>
-    <description>Status mismatch detected on ADU operation execution for SMP configuration.</description>
+    <description>
+      Status mismatch detected on ADU operation execution for SMP configuration.
+    </description>
     <ffdc>TARGET</ffdc>
     <ffdc>ADU_NUM_POLLS</ffdc>
-    <ffdc>NUM_CHIPS</ffdc>
+    <ffdc>CHIP_DATA_VALID</ffdc>
     <ffdc>GROUP_IDS</ffdc>
     <ffdc>CHIP_IDS</ffdc>
-    <ffdc>PB_CENT_MODE</ffdc>
-    <ffdc>PB_CENT_HP_MODE_CURR</ffdc>
-    <ffdc>PB_CENT_HP_MODE_NEXT</ffdc>
-    <ffdc>PB_CENT_HPX_MODE_CURR</ffdc>
-    <ffdc>PB_CENT_HPX_MODE_NEXT</ffdc>
-    <ffdc>PB_CENT_HPA_MODE_CURR</ffdc>
-    <ffdc>PB_CENT_HPA_MODE_NEXT</ffdc>
-    <ffdc>XB_CPLT_CONF1</ffdc>
-    <ffdc>PB_IOE_FIR_REG</ffdc>
-    <ffdc>OB0_CPLT_CONF1</ffdc>
-    <ffdc>OB1_CPLT_CONF1</ffdc>
-    <ffdc>OB2_CPLT_CONF1</ffdc>
-    <ffdc>OB3_CPLT_CONF1</ffdc>
-    <ffdc>IOE_PB_IOO_FIR_REG</ffdc>
-    <ffdc>ADU_SND_MODE_REG</ffdc>
+    <ffdc>FFDC_ADDRS</ffdc>
+    <ffdc>FFDC_REG_DATA</ffdc>
+    <callout>
+      <procedure>LVL_SUPPORT</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ******************************************************************** -->
 </hwpErrors>