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| author | Joshua Hannan <jlhannan@us.ibm.com> | 2016-09-16 15:59:26 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2016-09-28 17:57:44 -0400 |
| commit | 4d0306e4803ef8cff2b275ccdf879c8ebc096826 (patch) | |
| tree | 5ceffb7d50f3d7fe078dcec5d5a4d38b86355765 | |
| parent | 0b67e6ec69a48a9ea75f29e54bf7cf85dbb793f1 (diff) | |
| download | talos-hostboot-4d0306e4803ef8cff2b275ccdf879c8ebc096826.tar.gz talos-hostboot-4d0306e4803ef8cff2b275ccdf879c8ebc096826.zip | |
HW386071 defect workaround
Change-Id: Ie934cb2042a0e3a186c89f9c5497292848aefefc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29870
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30432
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C b/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C index 5566ea7ae..038b63a09 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_mpipl_chip_cleanup.C @@ -77,6 +77,9 @@ extern "C" { const uint8_t MAX_MCD_DIRS = 2; //Max of 2 MCD Directories (even and odd) fapi2::buffer<uint64_t> fsi_data[MAX_MCD_DIRS]; + fapi2::buffer<uint64_t> w_data(0x00030001); + fapi2::buffer<uint64_t> r_data; + const uint64_t C_INT_VC_VSD_TABLE_DATA(0x5013202); const uint64_t ARY_MCD_RECOVERY_CTRL_REGS_ADDRS[MAX_MCD_DIRS] = { PU_BANK0_MCD_REC, //MCD even recovery control register address @@ -88,6 +91,23 @@ extern "C" "Odd" //Ptr to char string "Odd" for odd MCD }; + + // HW386071: INT unit has a defect that might result in fake ecc errors. Have to do these four writes and reads to scom registers + FAPI_TRY(fapi2::putScom(i_target, PU_INT_VC_VSD_TABLE_ADDR, w_data), + "putScom error selecting address 1"); + + FAPI_TRY(fapi2::getScom(i_target, C_INT_VC_VSD_TABLE_DATA, r_data), + "getScom error reading from address 1"); + + w_data.clearBit<63>(); + FAPI_TRY(fapi2::putScom(i_target, PU_INT_VC_VSD_TABLE_ADDR, w_data), + "putScom error selecting address 0"); + + w_data.flush<0>(); + FAPI_TRY(fapi2::putScom(i_target, C_INT_VC_VSD_TABLE_DATA, w_data), + "putScom error writing to address 0"); + // HW386071 + //Verify MCD recovery was previously disabled for even and odd slices //If not, this is an error condition for (uint8_t counter = 0; counter < MAX_MCD_DIRS; counter++) |
