diff options
| author | Stephen Glancy <sglancy@us.ibm.com> | 2017-03-23 13:12:30 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-04-02 14:56:27 -0400 |
| commit | 3e8219fc02716052fd25528dd4541646bc5078ff (patch) | |
| tree | cd635c7b2af01d025d4a99cdab02b88965cef5c9 | |
| parent | 6a1cf7b94857a6b7bdc79482298ea951be849202 (diff) | |
| download | talos-hostboot-3e8219fc02716052fd25528dd4541646bc5078ff.tar.gz talos-hostboot-3e8219fc02716052fd25528dd4541646bc5078ff.zip | |
Fixed blue waterfall workaround bugs
Bugs fixed:
1) Workaround was not running on DD1.03
2) Workaround was cuing off of number of ranks not rank pairs
Change-Id: I704435ce217827a593d39c7c7ea536946bd86e0c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38369
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38372
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
4 files changed, 4 insertions, 21 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H index c6ff97660..b0235fa73 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H @@ -270,12 +270,10 @@ inline bool chip_ec_feature_blue_waterfall_adjust(const fapi2::Target<T>& i_targ { const auto l_chip = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(i_target); uint8_t l_value = 0; - uint8_t l_do_value = 0; FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_MSS_BLUE_WATERFALL_ADJUST, l_chip, l_value) ); - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_DO_BLUE_WATERFALL_ADJUST, l_chip, l_do_value) ); - return (l_value != 0) && (l_do_value == fapi2::ENUM_ATTR_DO_BLUE_WATERFALL_ADJUST_YES); + return (l_value != 0); fapi_try_exit: FAPI_ERR("failed accessing ATTR_CHIP_EC_FEATURE_MSS_BLUE_WATERFALL_ADJUST or ATTR_DO_BLUE_WATERFALL_ADJUST: 0x%lx (target: %s)", diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C index 53d19a2ba..16d56cf69 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C @@ -351,11 +351,11 @@ fapi2::ReturnCode fix_blue_waterfall_gate( const fapi2::Target<fapi2::TARGET_TYP }; // Gets the number of primary ranks to loop through - std::vector<uint64_t> l_primary_ranks; - FAPI_TRY(mss::rank::primary_ranks(i_target, l_primary_ranks)); + std::vector<uint64_t> l_rank_pairs; + FAPI_TRY(mss::rank::get_rank_pairs(i_target, l_rank_pairs)); // Loops through all configured rank pairs - for(uint64_t l_rp = 0; l_rp < l_primary_ranks.size(); ++l_rp) + for(const auto& l_rp : l_rank_pairs) { // Loops through all DP16s for(const auto& l_reg : l_dp16_registers[l_rp]) diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C index 0c14bcc2f..07fea18dc 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_getecid.C @@ -154,7 +154,6 @@ static fapi2::ReturnCode setup_memory_work_around_attributes( // All these attributes have 1 as their 'YES' enum value uint8_t l_value = 1; FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_MSS_TRAINING_BAD_BITS, i_target, l_value) ); - FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_DO_BLUE_WATERFALL_ADJUST, i_target, l_value) ); // The value for this is SKIP - we want to skip in sub DD1.03 HW FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_SKIP_RD_VREF_VREFSENSE_OVERRIDE, i_target, l_value) ); } diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml index 7e3e7cb2b..3594dfeaf 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_workarounds_attributes.xml @@ -93,18 +93,4 @@ <writeable/> </attribute> - <attribute> - <id>ATTR_DO_BLUE_WATERFALL_ADJUST</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - For Nimbus pre DD1.** we want to adjust the blue waterfall values - and their associated gate delays if the blue waterfalls are 0. - Post DD1.** will have a hardware enabled fix for this. - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <enum>NO = 0, YES = 1</enum> - <writeable/> - </attribute> - </attributes> |
