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| author | Joe McGill <jmcgill@us.ibm.com> | 2018-06-22 18:24:01 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-06-28 13:53:47 -0400 |
| commit | 352adcc2ae3ea92e735fa365149f57c1381145e6 (patch) | |
| tree | 61782d7618cbe4f10488b0904192d46af70d94c5 | |
| parent | e53ffaa95148a2c58a07158bcfdfdd9a3f27bcf7 (diff) | |
| download | talos-hostboot-352adcc2ae3ea92e735fa365149f57c1381145e6.tar.gz talos-hostboot-352adcc2ae3ea92e735fa365149f57c1381145e6.zip | |
Update Cumulus MI runtime FIR settings
match XML changes in 57382
Change-Id: I5e658d01e4959f1fddf4dea24735dc5db728e134
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61229
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Marc Gollub <gollub@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61236
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C | 25 |
1 files changed, 23 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C index a5ccc13c5..95728d701 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -1351,15 +1351,36 @@ fapi2::ReturnCode unmaskMCFIR( l_mcfiraction.setBit<MCS_MCFIR_MC_INTERNAL_RECOVERABLE_ERROR>(); l_mcfiraction.setBit<MCS_MCFIR_COMMAND_LIST_TIMEOUT>(); + if (T == fapi2::TARGET_TYPE_MI) + { + l_mcfiraction.setBit<MCS_MCFIR_MS_WAT_DEBUG_CONFIG_REG_ERROR>(); + } + // Setup FIR bits in MC Fault Isolation Mask Register buffer l_mcfirmask_and.flush<1>(); + + if (T == fapi2::TARGET_TYPE_MI) + { + l_mcfirmask_and.clearBit<MCS_MCFIR_INBAND_BAR_HIT_WITH_INCORRECT_TTYPE>(); + } + l_mcfirmask_and.clearBit<MCS_MCFIR_MC_INTERNAL_RECOVERABLE_ERROR>(); l_mcfirmask_and.clearBit<MCS_MCFIR_MC_INTERNAL_NONRECOVERABLE_ERROR>(); l_mcfirmask_and.clearBit<MCS_MCFIR_POWERBUS_PROTOCOL_ERROR>(); l_mcfirmask_and.clearBit<MCS_MCFIR_MULTIPLE_BAR>(); - l_mcfirmask_and.clearBit<MCS_MCFIR_INVALID_ADDRESS>(); + + if (T == fapi2::TARGET_TYPE_MCS) + { + l_mcfirmask_and.clearBit<MCS_MCFIR_INVALID_ADDRESS>(); + } + l_mcfirmask_and.clearBit<MCS_MCFIR_COMMAND_LIST_TIMEOUT>(); + if (T == fapi2::TARGET_TYPE_MI) + { + l_mcfirmask_and.clearBit<MCS_MCFIR_MS_WAT_DEBUG_CONFIG_REG_ERROR>(); + } + for (auto l_pair : i_mcBarDataPair) { fapi2::Target<T> l_target = l_pair.first; |
