Generate error log when FAPI get or set attribute fails

Change-Id: I77b193010c6038cfab9a2dfd98f3a39a8270506f
RTC: 154397
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24863
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 62 insertions, 1367 deletions

diff --git a/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H b/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H
index ded48259c..9c76cc0e6 100644
--- a/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H
+++ b/src/include/usr/fapi2/hwpf_fapi2_reasoncodes.H
@@ -52,6 +52,8 @@ namespace fapi2
         MOD_FAPI2_PLAT_GET_OTHER_END                = 0x09,
         MOD_FAPI2_MVPD_ACCESS                       = 0x0A,
         MOD_FAPI2_PLAT_GET_CHILDREN_FILTER_TEST     = 0x0B,
+        MOD_FAPI2_GET_TARGETING_ATTR                = 0x0C,
+        MOD_FAPI2_SET_TARGETING_ATTR                = 0x0D,
     };
 
     /**
@@ -104,6 +106,7 @@ namespace fapi2
         RC_INCORRECT_OTHER_END         = FAPI2_COMP_ID | 0x24,
         RC_FOUND_TOO_MANY_PEERS        = FAPI2_COMP_ID | 0x25,
         RC_FOUND_NO_PEERS              = FAPI2_COMP_ID | 0x26,
+        RC_INVALID_ATTRIBUTE           = FAPI2_COMP_ID | 0x27,
 
         // HWP generated errors
         RC_HWP_GENERATED_ERROR         = HWPF_COMP_ID | 0x0f,
diff --git a/src/usr/fapi2/attribute_service.C b/src/usr/fapi2/attribute_service.C
index 5df1eafe9..995ed9b02 100644
--- a/src/usr/fapi2/attribute_service.C
+++ b/src/usr/fapi2/attribute_service.C
@@ -200,6 +200,27 @@ ReturnCode getTargetingAttr(
             FAPI_ERR("getTargetingAttr: Error from getTargetingAttrHelper "
                      "for target 0x%.8X and attribute 0x%x",
                      TARGETING::get_huid(l_pTargTarget), i_targAttrId);
+
+            /*@
+             * @errortype
+             * @moduleid          fapi2::MOD_FAPI2_GET_TARGETING_ATTR
+             * @reasoncode        RC_INVALID_ATTRIBUTE
+             * @userdata1[0:31]   FAPI2 Target Type
+             * @userdata1[32:63]  HB Target HUID
+             * @userdata2         Requested attribute ID
+             * @devdesc           Invalid attribute read request
+             * @custdesc          Firmware Error
+             */
+            l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+                                             MOD_FAPI2_GET_TARGETING_ATTR,
+                                             RC_INVALID_ATTRIBUTE,
+                                             TWO_UINT32_TO_UINT64(
+                                              i_pFapiTarget.getType(),
+                                              TARGETING::get_huid(l_pTargTarget)
+                                             ),
+                                             i_targAttrId);
+
+            l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl));
         }
     }
     return l_rc;
@@ -252,6 +273,27 @@ ReturnCode setTargetingAttr(
             FAPI_ERR("setTargetingAttr: Error from setTargetingAttrHelper "
                      "for target 0x%.8X and attribute 0x%x",
                      TARGETING::get_huid(l_pTargTarget), i_targAttrId);
+
+            /*@
+             * @errortype
+             * @moduleid          fapi2::MOD_FAPI2_SET_TARGETING_ATTR
+             * @reasoncode        RC_INVALID_ATTRIBUTE
+             * @userdata1[0:31]   FAPI2 Target Type
+             * @userdata1[32:63]  HB Target HUID
+             * @userdata2         Requested attribute ID
+             * @devdesc           Invalid attribute write request
+             * @custdesc          Firmware Error
+             */
+            l_errl = new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
+                                             MOD_FAPI2_SET_TARGETING_ATTR,
+                                             RC_INVALID_ATTRIBUTE,
+                                             TWO_UINT32_TO_UINT64(
+                                              i_pFapiTarget.getType(),
+                                              TARGETING::get_huid(l_pTargTarget)
+                                             ),
+                                             i_targAttrId);
+
+            l_rc.setPlatDataPtr(reinterpret_cast<void *> (l_errl));
         }
     }
     return l_rc;
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index b20555b03..88d3a47d3 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -21487,21 +21487,6 @@ DEPRECATED!!!!
   </hwpfToHbAttrMap>
 </attribute>
 
-<attribute>
-  <id>FABRIC_SYSTEM_ID</id>
-  <description>Logical fabric system ID associated with this chip. Provided by the MRW.</description>
-  <simpleType>
-    <uint8_t>
-    </uint8_t>
-  </simpleType>
-  <persistency>volatile-zeroed</persistency>
-  <readable/>
-  <hwpfToHbAttrMap>
-    <id>ATTR_FABRIC_SYSTEM_ID</id>
-    <macro>DIRECT</macro>
-  </hwpfToHbAttrMap>
-</attribute>
-
 <!-- name changed in ekb, need to have both to push interim commits through -->
 <attribute>
   <id>PROC_FABRIC_SYSTEM_ID</id>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 888cd3775..ada193c00 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -51,279 +51,6 @@
 </targetType>
 
 <targetType>
-    <id>sys-sys-power8</id>
-    <parent>base</parent>
-    <attribute><id>CLASS</id><default>SYS</default></attribute>
-    <attribute><id>TYPE</id><default>SYS</default></attribute>
-    <attribute><id>MODEL</id><default>POWER8</default></attribute>
-    <attribute><id>HUID</id><default>0x00010000</default></attribute>
-    <attribute><id>EXECUTION_PLATFORM</id></attribute>
-    <attribute><id>SCRATCH_UINT8_1</id></attribute>
-    <attribute><id>SCRATCH_UINT8_2</id></attribute>
-    <attribute><id>SCRATCH_UINT32_1</id></attribute>
-    <attribute><id>SCRATCH_UINT32_2</id></attribute>
-    <attribute><id>SCRATCH_UINT64_1</id></attribute>
-    <attribute><id>SCRATCH_UINT64_2</id></attribute>
-    <attribute><id>SCRATCH_UINT8_ARRAY_1</id></attribute>
-    <attribute><id>SCRATCH_UINT8_ARRAY_2</id></attribute>
-    <attribute><id>SCRATCH_UINT32_ARRAY_1</id></attribute>
-    <attribute><id>SCRATCH_UINT32_ARRAY_2</id></attribute>
-    <attribute><id>SCRATCH_UINT64_ARRAY_1</id></attribute>
-    <attribute><id>SCRATCH_UINT64_ARRAY_2</id></attribute>
-    <attribute><id>NUMERIC_POD_TYPE_TEST</id></attribute>
-    <attribute><id>DUMMY_RW</id></attribute>
-    <attribute><id>XSCOM_BASE_ADDRESS</id></attribute>
-    <attribute><id>TEST_NULL_STRING</id></attribute>
-    <attribute><id>TEST_MIN_STRING</id><default>Z</default></attribute>
-    <attribute><id>TEST_MAX_STRING</id></attribute>
-    <attribute><id>TEST_NO_DEFAULT_STRING</id></attribute>
-    <attribute>
-        <id>PHYS_PATH</id>
-        <default>physical:sys-0</default>
-    </attribute>
-    <attribute>
-        <id>AFFINITY_PATH</id>
-        <default>affinity:sys-0</default>
-    </attribute>
-    <attribute>
-        <id>IS_SIMULATION</id>
-        <default>0</default>
-    </attribute>
-    <attribute><id>ISTEP_MODE</id></attribute>
-    <attribute><id>PROC_EPS_TABLE_TYPE</id></attribute>
-    <attribute><id>PROC_FABRIC_PUMP_MODE</id></attribute>
-    <attribute><id>PROC_X_BUS_WIDTH</id></attribute>
-    <attribute><id>ALL_MCS_IN_INTERLEAVING_GROUP</id></attribute>
-    <attribute><id>FREQ_PROC_REFCLOCK</id></attribute>
-    <attribute><id>FREQ_PROC_REFCLOCK_KHZ</id></attribute>
-    <attribute><id>FREQ_MEM_REFCLOCK</id></attribute>
-    <attribute><id>FREQ_PB_MHZ</id></attribute>
-    <attribute><id>FREQ_A_MHZ</id></attribute>
-    <attribute><id>FREQ_X_MHZ</id></attribute>
-    <attribute><id>SP_FUNCTIONS</id></attribute>
-    <attribute><id>HB_SETTINGS</id></attribute>
-    <attribute><id>CEC_IPL_TYPE</id></attribute>
-    <attribute><id>PAYLOAD_KIND</id></attribute>
-    <attribute><id>PAYLOAD_BASE</id></attribute>
-    <attribute><id>PAYLOAD_ENTRY</id></attribute>
-    <attribute><id>HB_HRMOR_NODAL_BASE</id></attribute>
-    <attribute><id>MSS_MBA_ADDR_INTERLEAVE_BIT</id></attribute>
-    <attribute><id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id></attribute>
-    <attribute><id>MIRROR_BASE_ADDRESS</id></attribute>
-    <attribute><id>PAYLOAD_IN_MIRROR_MEM</id></attribute>
-    <attribute><id>FREQ_PCIE_MHZ</id></attribute>
-    <attribute><id>L2_R_T0_EPS</id></attribute>
-    <attribute><id>L2_R_T1_EPS</id></attribute>
-    <attribute><id>L2_R_T2_EPS</id></attribute>
-    <attribute><id>L2_FORCE_R_T2_EPS</id></attribute>
-    <attribute><id>L2_W_EPS</id></attribute>
-    <attribute><id>L3_R_T0_EPS</id></attribute>
-    <attribute><id>L3_R_T1_EPS</id></attribute>
-    <attribute><id>L3_R_T2_EPS</id></attribute>
-    <attribute><id>L3_FORCE_R_T2_EPS</id></attribute>
-    <attribute><id>L3_W_EPS</id></attribute>
-    <attribute><id>NOMINAL_FREQ_MHZ</id></attribute>
-    <attribute><id>ULTRA_TURBO_FREQ_MHZ</id></attribute>
-    <attribute><id>WOF_ENABLED</id></attribute>
-    <attribute><id>MNFG_FLAGS</id></attribute>
-    <attribute><id>FABRIC_TO_PHYSICAL_NODE_MAP</id></attribute>
-    <attribute><id>MFG_TRACE_ENABLE</id></attribute>
-    <attribute><id>TPM_REQUIRED</id></attribute>
-    <!-- Start memory_attributes.xml -->
-    <attribute><id>MRW_POWER_CONTROL_REQUESTED</id></attribute>
-    <attribute><id>MRW_DDR3_VDDR_MAX_LIMIT</id></attribute>
-    <attribute><id>MRW_DDR4_VDDR_MAX_LIMIT</id></attribute>
-    <attribute><id>MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id></attribute>
-    <attribute><id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id></attribute>
-    <attribute><id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id></attribute>
-    <attribute><id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id></attribute>
-    <!-- Start pm_plat_attributes.xml -->
-    <attribute><id>PM_EXTERNAL_VRM_STEPSIZE</id></attribute>
-    <attribute><id>PM_EXTERNAL_VRM_STEPDELAY</id></attribute>
-    <attribute><id>PM_SPIVID_FREQUENCY</id></attribute>
-    <attribute><id>PM_SAFE_FREQUENCY</id></attribute>
-    <attribute><id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id></attribute>
-    <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id></attribute>
-    <attribute><id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id></attribute>
-    <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id></attribute>
-    <attribute><id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id></attribute>
-    <attribute><id>PM_SPIPSS_FREQUENCY</id></attribute>
-    <attribute><id>FREQ_CORE_MAX</id></attribute>
-    <attribute><id>CPM_TURBO_BOOST_PERCENT</id></attribute>
-    <!-- End pm_plat_attributes.xml -->
-    <!-- Start pm_hwp_attributes.xml -->
-    <attribute><id>PM_SLW_CONTROL_VECTOR_OFFSET</id></attribute>
-    <!-- End pm_hwp_attributes.xml -->
-    <!-- sbe_config_update attributes    -->
-    <attribute><id>NEST_FREQ_MHZ</id></attribute>
-    <attribute><id>BOOT_FREQ_MHZ</id></attribute>
-    <attribute><id>EX_GARD_BITS</id></attribute>
-    <attribute><id>PIB_I2C_REFCLOCK</id></attribute>
-    <attribute><id>PIB_I2C_NEST_PLL</id></attribute>
-    <attribute><id>SBE_IMAGE_OFFSET</id></attribute>
-    <attribute><id>BOOT_VOLTAGE</id></attribute>
-    <attribute><id>SYNC_BETWEEN_STEPS</id></attribute>
-    <attribute><id>SBE_IMAGE_MINIMUM_VALID_EXS</id></attribute>
-    <!-- End sbe_config_update attributes    -->
-    <!-- Start erepair_thresholds.xml -->
-    <attribute><id>X_EREPAIR_THRESHOLD_FIELD</id></attribute>
-    <attribute><id>A_EREPAIR_THRESHOLD_FIELD</id></attribute>
-    <attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id></attribute>
-    <attribute><id>X_EREPAIR_THRESHOLD_MNFG</id></attribute>
-    <attribute><id>A_EREPAIR_THRESHOLD_MNFG</id></attribute>
-    <attribute><id>DMI_EREPAIR_THRESHOLD_MNFG</id></attribute>
-    <!-- End erepair_thresholds.xml -->
-    <!-- proc_fab_smp_fabric_attributes.xml -->
-    <attribute><id>FREQ_CORE</id></attribute>
-    <attribute><id>PROC_EPS_GB_PERCENTAGE</id></attribute>
-    <attribute><id>PROC_EPS_GB_DIRECTION</id></attribute>
-    <attribute><id>PROC_FABRIC_ASYNC_SAFE_MODE</id></attribute>
-    <!-- End proc_fab_smp_fabric_attributes.xml -->
-
-    <!-- Start proc_abus_dmi_xbus_scominit.xml -->
-    <attribute><id>MNFG_DMI_MIN_EYE_WIDTH</id></attribute>
-    <attribute><id>MNFG_DMI_MIN_EYE_HEIGHT</id></attribute>
-    <attribute><id>MNFG_ABUS_MIN_EYE_WIDTH</id></attribute>
-    <attribute><id>MNFG_ABUS_MIN_EYE_HEIGHT</id></attribute>
-    <attribute><id>MNFG_XBUS_MIN_EYE_WIDTH</id></attribute>
-    <!-- End proc_abus_dmi_xbus_scominit.xml -->
-
-    <attribute><id>ENABLED_THREADS</id></attribute>
-    <attribute><id>MSS_ZSERIES</id></attribute>
-
-    <!-- Max/min config attributes -->
-    <attribute><id>MAX_PROC_CHIPS_PER_NODE</id></attribute>
-    <attribute><id>MAX_EXS_PER_PROC_CHIP</id></attribute>
-    <attribute>
-        <id>MAX_DIMMS_PER_MBA_PORT</id>
-        <default>2</default>
-    </attribute>
-    <attribute>
-        <id>MAX_MBA_PORTS_PER_MBA</id>
-        <default>2</default>
-    </attribute>
-    <attribute>
-        <id>MAX_MBAS_PER_MEMBUF_CHIP</id>
-        <default>2</default>
-    </attribute>
-    <attribute>
-        <id>MAX_CHIPLETS_PER_PROC</id>
-        <default>32</default>
-    </attribute>
-    <attribute><id>MAX_MCS_PER_SYSTEM</id></attribute>
-    <!-- End max/min config attributes -->
-    <attribute><id>PROC_PBIEX_ASYNC_SEL</id></attribute>
-    <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id></attribute>
-    <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id></attribute>
-    <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id></attribute>
-    <attribute><id>PLCK_IPL_ATTR_OVERRIDES_EXIST</id></attribute>
-    <attribute><id>DUMMY_PERSISTENCY</id></attribute>
-    <attribute><id>MEM_MIRROR_PLACEMENT_POLICY</id></attribute>
-    <attribute><id>RISK_LEVEL</id></attribute>
-    <attribute><id>CDM_POLICIES</id></attribute>
-    <attribute><id>HOSTSVC_PLID</id></attribute>
-    <attribute><id>RUN_MAX_MEM_PATTERNS</id></attribute>
-    <attribute><id>LAB_USE_JTAG_MODE</id></attribute>
-    <attribute><id>MSS_CONTROL_SWITCH</id></attribute>
-    <attribute><id>DISABLE_I2C_ACCESS</id></attribute>
-    <attribute><id>PROC_REFCLOCK_RCVR_TERM</id></attribute>
-    <attribute><id>PCI_REFCLOCK_RCVR_TERM</id></attribute>
-    <attribute><id>MEMB_DMI_REFCLOCK_RCVR_TERM</id></attribute>
-    <attribute><id>MEMB_DDR_REFCLOCK_RCVR_TERM</id></attribute>
-    <attribute><id>MEM_FILTER_PLL_SOURCE</id></attribute>
-    <attribute><id>EFFECTIVE_EC</id></attribute>
-    <attribute><id>MIN_FREQ_MHZ</id></attribute>
-    <attribute><id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id></attribute>
-    <attribute><id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id></attribute>
-    <attribute><id>MRW_MEM_THROTTLE_DENOMINATOR</id></attribute>
-    <attribute><id>MRW_MAX_DRAM_DATABUS_UTIL</id></attribute>
-    <attribute><id>RECONFIGURE_LOOP</id></attribute>
-    <attribute><id>PM_SYSTEM_IVRMS_ENABLED</id></attribute>
-    <attribute><id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id></attribute>
-    <attribute><id>PM_SLW_DEEP_WINKLE_EXIT_GOOD_HALT_ADDR</id></attribute>
-    <attribute><id>PM_SLW_DEEP_SLEEP_EXIT_GOOD_HALT_ADDR</id></attribute>
-    <attribute><id>MULTI_SCOM_BUFFER_MAX_SIZE</id></attribute>
-    <attribute><id>DISABLE_SCRUB_AFTER_PATTERN_TEST</id></attribute>
-    <attribute><id>PM_PCBS_FSM_TRACE_EN</id></attribute>
-    <attribute><id>PM_GLOBAL_FIR_TRACE_EN</id></attribute>
-    <attribute><id>MRW_STRICT_MBA_PLUG_RULE_CHECKING</id></attribute>
-    <attribute><id>MRW_ENHANCED_GROUPING_NO_MIRRORING</id></attribute>
-    <attribute><id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id></attribute>
-    <attribute><id>MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE</id></attribute>
-    <attribute><id>MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE</id></attribute>
-    <attribute><id>HB_RSV_MEM_SIZE_MB</id></attribute>
-    <attribute><id>PM_HWP_ATTR_VERSION</id></attribute>
-    <attribute><id>DO_ABUS_DECONFIG</id></attribute>
-    <attribute><id>REDUNDANT_CLOCKS</id></attribute>
-    <attribute><id>MSS_VOLT_VDDR_OFFSET_DISABLE</id></attribute>
-    <attribute><id>MSS_VOLT_VPP_OFFSET_DISABLE</id></attribute>
-    <attribute><id>MSS_CENT_VDD_OFFSET_DISABLE</id></attribute>
-    <attribute><id>MSS_CENT_VCS_OFFSET_DISABLE</id></attribute>
-    <attribute><id>MSS_CENT_AVDD_OFFSET_DISABLE</id></attribute>
-    <attribute><id>MSS_CENT_AVDD_SLOPE_ACTIVE</id></attribute>
-    <attribute><id>MSS_CENT_AVDD_SLOPE_INACTIVE</id></attribute>
-    <attribute><id>MSS_CENT_AVDD_INTERCEPT</id></attribute>
-    <attribute><id>MSS_VOLT_VPP_SLOPE</id></attribute>
-    <attribute><id>MSS_VOLT_VPP_INTERCEPT</id></attribute>
-    <attribute><id>MSS_VOLT_DDR3_VDDR_SLOPE</id></attribute>
-    <attribute><id>MSS_VOLT_DDR3_VDDR_INTERCEPT</id></attribute>
-    <attribute><id>MSS_VOLT_DDR4_VDDR_SLOPE</id></attribute>
-    <attribute><id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id></attribute>
-    <attribute><id>MSS_VDDR_OVERIDE_SPD</id></attribute>
-    <attribute><id>MSS_VOLT_COMPLIANT_DIMMS</id></attribute>
-    <attribute><id>PM_PFET_WORKAROUND_RUN_FLAG</id></attribute>
-    <attribute><id>PM_SLEEP_ENABLE</id></attribute>
-    <attribute><id>MSS_DRAMINIT_RESET_DISABLE</id></attribute>
-    <attribute><id>RECONFIG_LOOP_TESTS</id></attribute>
-    <attribute><id>RECONFIG_LOOP_TESTS_ENABLE</id></attribute>
-    <attribute><id>ISTEP_PAUSE_ENABLE</id></attribute>
-    <attribute><id>ISTEP_PAUSE_CONFIG</id></attribute>
-    <!-- Manufacturing threshold Attributes of PRD -->
-    <attribute><id>MNFG_TH_P8EX_L2_CACHE_CES</id></attribute>
-    <attribute><id>MNFG_TH_P8EX_L2_DIR_CES</id></attribute>
-    <attribute><id>MNFG_TH_P8EX_L3_CACHE_CES</id></attribute>
-    <attribute><id>MNFG_TH_P8EX_L3_DIR_CES</id></attribute>
-    <attribute><id>FIELD_TH_P8EX_L2_LINE_DELETES</id></attribute>
-    <attribute><id>FIELD_TH_P8EX_L2_COL_REPAIRS</id></attribute>
-    <attribute><id>FIELD_TH_P8EX_L3_LINE_DELETES</id></attribute>
-    <attribute><id>FIELD_TH_P8EX_L3_COL_REPAIRS</id></attribute>
-    <attribute><id>MNFG_TH_P8EX_L2_LINE_DELETES</id></attribute>
-    <attribute><id>MNFG_TH_P8EX_L2_COL_REPAIRS</id></attribute>
-    <attribute><id>MNFG_TH_P8EX_L3_LINE_DELETES</id></attribute>
-    <attribute><id>MNFG_TH_P8EX_L3_COL_REPAIRS</id></attribute>
-    <attribute><id>MNFG_TH_CEN_MBA_RT_SOFT_CE_TH_ALGO</id></attribute>
-    <attribute><id>MNFG_TH_CEN_MBA_IPL_SOFT_CE_TH_ALGO</id></attribute>
-    <attribute><id>MNFG_TH_CEN_MBA_RT_RCE_PER_RANK</id></attribute>
-    <attribute><id>MNFG_TH_CEN_L4_CACHE_CES</id></attribute>
-    <attribute><id>OPT_MEMMAP_GROUP_POLICY</id></attribute>
-    <attribute><id>FRU_ID</id></attribute>
-    <attribute><id>BMC_FRU_ID</id></attribute>
-    <attribute><id>BRAZOS_RX_FIFO_OVERRIDE</id></attribute>
-    <attribute><id>HIDDEN_ERRLOGS_ENABLE</id></attribute>
-    <attribute><id>MRW_NEST_CAPABLE_FREQUENCIES_SYS</id></attribute>
-    <attribute><id>WOF_ENABLED</id></attribute>
-    <attribute><id>TRUSTED_SLAVE_SCAN_PATH_ACTIVE</id></attribute>
-    <attribute><id>FORCE_SKIP_SBE_MASTER_INTR_SERVICE</id></attribute>
-    <attribute><id>FORCE_USE_SBE_SLAVE_SCAN_SERVICE</id></attribute>
-    <attribute><id>SBE_MASTER_INTR_SERVICE_DELAY_CYCLES</id></attribute>
-    <attribute><id>SBE_MASTER_INTR_SERVICE_DELAY_US</id></attribute>
-    <attribute><id>MRW_MCS_PREFETCH_RETRY_THRESHOLD</id></attribute>
-    <!-- AVP override for fused cores or normal cores -->
-    <attribute><id>FUSED_CORE_OPTION</id></attribute>
-
-<!--- TODO: RTC 155880
-      The attributes in this block have their names changed from ATTR_x to ATTR_x_MHZ.
-      The old definitions are left in this block in order to avoid build break in FSP.
-      They are to be removed when code in FSP are  updated to use the new names. -->
-    <attribute><id>FREQ_PCIE</id></attribute>
-    <attribute><id>FREQ_A</id></attribute>
-    <attribute><id>FREQ_PB</id></attribute>
-    <attribute><id>FREQ_X</id></attribute>
-<!-- End TODO -->
-
-</targetType>
-
-<targetType>
     <id>chip</id>
     <parent>base</parent>
     <attribute>
@@ -582,6 +309,8 @@
     <attribute><id>PROC_FABRIC_X_ATTACHED_CHIP_ID</id></attribute>
     <attribute><id>PROC_FABRIC_A_ADDR_DIS</id></attribute>
     <attribute><id>PROC_FABRIC_X_ADDR_DIS</id></attribute>
+    <attribute><id>PROC_FABRIC_SYSTEM_ID</id></attribute>
+    <attribute><id>PROC_OCC_SANDBOX_BASE_ADDR</id></attribute>
     <attribute><id>PROC_HTM_BAR_SIZES</id></attribute>
 
     <attribute><id>PROC_PCIE_HOTPLUG_I2C_DEVICE_ADDRESS</id></attribute>
@@ -595,200 +324,6 @@
     <attribute><id>PROC_FABRIC_OPTICS_CONFIG_MODE</id></attribute>
     <attribute><id>PROC_FABRIC_A_AGGREGATE</id></attribute>
     <attribute><id>PROC_FABRIC_X_AGGREGATE</id></attribute>
-
-</targetType>
-
-
-<targetType>
-    <id>chip-processor-power8</id>
-    <parent>chip-processor</parent>
-    <attribute><id>DUMMY_RW</id></attribute>
-    <attribute><id>DUMMY_HEAP_ZERO_DEFAULT</id></attribute>
-    <attribute><id>MSS_MEM_MC_IN_GROUP</id></attribute>
-    <attribute><id>EEPROM_VPD_PRIMARY_INFO</id></attribute>
-    <attribute><id>EEPROM_VPD_BACKUP_INFO</id></attribute>
-    <attribute><id>EEPROM_SBE_PRIMARY_INFO</id></attribute>
-    <attribute><id>EEPROM_SBE_BACKUP_INFO</id></attribute>
-    <attribute>
-        <id>I2C_BUS_SPEED_ARRAY</id>
-        <default>1000,1000,0,0,0,0</default>
-    </attribute>
-
-    <!-- From PHYP Memory Map -->
-
-    <attribute><id>NPU_MMIO_BAR_ENABLE</id></attribute>
-    <attribute><id>NPU_MMIO_BAR_BASE_ADDR</id></attribute>
-    <attribute><id>NPU_MMIO_BAR_SIZE</id></attribute>
-    <attribute><id>FSP_BASE_ADDR</id></attribute>
-    <attribute><id>FSP_BAR_SIZE</id></attribute>
-    <attribute><id>FSP_MMIO_MASK_SIZE</id></attribute>
-    <attribute><id>PSI_BRIDGE_BASE_ADDR</id></attribute>
-    <attribute><id>INTP_BASE_ADDR</id></attribute>
-    <attribute><id>PHB_BASE_ADDRS</id></attribute>
-    <attribute><id>PCI_BASE_ADDRS_64</id></attribute>
-    <attribute><id>PCI_BASE_ADDRS_32</id></attribute>
-    <attribute><id>MEM_BASE</id></attribute>
-    <attribute><id>MIRROR_BASE</id></attribute>
-    <attribute><id>RNG_BASE_ADDR</id></attribute>
-    <attribute><id>RNG_BAR_SIZE</id></attribute>
-    <attribute><id>IMT_BASE_ADDR</id></attribute>
-    <attribute><id>IMT_BAR_SIZE</id></attribute>
-    <attribute><id>IBSCOM_PROC_BASE_ADDR</id></attribute>
-    <!-- end Memory Map -->
-
-    <!-- PROC_PCIE  attributes -->
-    <attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_SWAP</id></attribute>
-    <attribute><id>PROC_PCIE_PHB_ACTIVE</id></attribute>
-    <attribute><id>PROC_PCIE_LANE_MASK</id></attribute>
-    <attribute><id>PROC_PCIE_LANE_MASK_NON_BIFURCATED</id></attribute>
-    <attribute><id>PROC_PCIE_LANE_MASK_BIFURCATED</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_SWAP_NON_BIFURCATED</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_SWAP_BIFURCATED</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_REVERSAL</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_REVERSAL_NON_BIFURCATED</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_REVERSAL_BIFURCATED</id></attribute>
-    <attribute><id>PROC_PCIE_DSMP_CAPABLE</id></attribute>
-    <attribute><id>PROC_PCIE_LANE_EQUALIZATION</id></attribute>
-    <attribute><id>PROC_PCIE_IS_SLOT</id></attribute>
-
-    <attribute><id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PCS_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PCS_CONTROL1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_BWLOSS1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_RX_PEAK</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_RX_SDL</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_ZCAL_CONTROL</id></attribute>
-    <attribute><id>PROC_DCM_INSTALLED</id></attribute>
-    <attribute><id>CHIP_REGIONS_TO_ENABLE</id></attribute>
-    <attribute><id>PROC_ADU_UNTRUSTED_BAR_BASE_ADDR</id></attribute>
-    <attribute><id>PROC_ADU_UNTRUSTED_BAR_SIZE</id></attribute>
-    <attribute><id>PROC_PSI_UNTRUSTED_BAR0_BASE_ADDR</id></attribute>
-    <attribute><id>PROC_PSI_UNTRUSTED_BAR0_SIZE</id></attribute>
-    <attribute><id>PROC_PSI_UNTRUSTED_BAR1_BASE_ADDR</id></attribute>
-    <attribute><id>PROC_PSI_UNTRUSTED_BAR1_SIZE</id></attribute>
-    <attribute><id>PROC_PERV_BNDY_PLL_CHIPLET_ID</id></attribute>
-    <attribute><id>PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id></attribute>
-    <attribute><id>PROC_AB_BNDY_PLL_CHIPLET_ID</id></attribute>
-    <attribute><id>PROC_PCI_BNDY_PLL_CHIPLET_ID</id></attribute>
-    <attribute><id>PROC_PERV_BNDY_PLL_SCAN_SELECT</id></attribute>
-    <attribute><id>PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id></attribute>
-    <attribute><id>PROC_AB_BNDY_PLL_SCAN_SELECT</id></attribute>
-    <attribute><id>PROC_PCI_BNDY_PLL_SCAN_SELECT</id></attribute>
-    <attribute><id>PROC_PCIE_REFCLOCK_ENABLE</id></attribute>
-    <attribute><id>ECID</id></attribute>
-
-    <attribute><id>PROC_HTM_BAR_SIZE</id></attribute>
-    <attribute><id>PROC_HTM_BAR_BASE_ADDR</id></attribute>
-    <attribute><id>PROC_OCC_SANDBOX_BASE_ADDR</id></attribute>
-    <attribute><id>PROC_AS_MMIO_BAR_BASE_ADDR</id></attribute>
-    <attribute><id>PROC_AS_MMIO_BAR_ENABLE</id></attribute>
-    <attribute><id>PROC_AS_MMIO_BAR_SIZE</id></attribute>
-    <attribute><id>PROC_BOOT_VOLTAGE_VID</id></attribute>
-    <attribute><id>PROC_PBA_UNTRUSTED_BAR_BASE_ADDR</id></attribute>
-    <attribute><id>PROC_PBA_UNTRUSTED_BAR_SIZE</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2</id></attribute>
-    <attribute><id>I2C_SLAVE_ADDRESS</id></attribute>
-    <attribute><id>PROC_PCIE_NUM_PHB</id></attribute>
-    <attribute><id>PROC_PCIE_NUM_IOP</id></attribute>
-    <attribute><id>PROC_PCIE_NUM_LANES</id></attribute>
-
-</targetType>
-
-<targetType>
-    <id>chip-processor-venice</id>
-    <parent>chip-processor-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-    <attribute><id>DUMMY_RW</id></attribute>
-    <attribute><id>DUMMY_HEAP_ZERO_DEFAULT</id></attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_PHB</id>
-        <default>3</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_IOP</id>
-        <default>2</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_LANES</id>
-        <default>32</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
-        <default>0xE0</default>
-    </attribute>
-    <attribute>
-        <id>DEFAULT_PROC_MODULE_NEST_FREQ_MHZ</id>
-        <default>2400</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>chip-processor-murano</id>
-    <parent>chip-processor-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_PHB</id>
-        <default>3</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_IOP</id>
-        <default>2</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_LANES</id>
-        <default>24</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
-        <default>0xE0</default>
-    </attribute>
-    <attribute>
-        <id>DEFAULT_PROC_MODULE_NEST_FREQ_MHZ</id>
-        <default>2000</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>chip-processor-naples</id>
-    <parent>chip-processor-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_PHB</id>
-        <default>4</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_IOP</id>
-        <default>3</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_LANES</id>
-        <default>40</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
-        <default>0xF0</default>
-    </attribute>
-    <attribute>
-        <id>DEFAULT_PROC_MODULE_NEST_FREQ_MHZ</id>
-        <default>2400</default>
-    </attribute>
 </targetType>
 
 <targetType>
@@ -816,708 +351,6 @@
     </attribute>
 </targetType>
 
-<targetType>
-    <id>unit-ex-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>EX</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <!-- Start pm_hwp_attributes.xml -->
-    <attribute><id>PM_SPWUP_FSP</id></attribute>
-    <attribute><id>PM_SPWUP_OCC</id></attribute>
-    <attribute><id>PM_SPWUP_PHYP</id></attribute>
-    <!-- End pm_hwp_attributes.xml -->
-    <attribute><id>OVERRIDE_MVPD_NOM_FREQ_MHZ</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_NEST_NOM_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_CS_NOM_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_CS_NOM_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_PS_FREQ_MHZ</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_NEST_PS_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_NEST_PS_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_CS_PS_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_CS_PS_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_TURBO_FREQ_MHZ</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_NEST_TURBO_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_CS_TURBO_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_FVMIN_FREQ_MHZ</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_CS_FVMIN_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_LAB_FREQ_MHZ</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_NEST_LAB_CURRENT</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_V_CS_LAB_VOLTAGE</id></attribute>
-    <attribute><id>OVERRIDE_MVPD_I_CS_LAB_CURRENT</id></attribute>
-    <attribute><id>PM_SPWUP_IGNORE_XSTOP_FLAG</id></attribute>
-    <attribute><id>FREQ_CORE</id></attribute>
-    <attribute><id>CDM_DOMAIN</id><default>CPU</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-ex-venice</id>
-    <parent>unit-ex-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-ex-murano</id>
-    <parent>unit-ex-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-ex-naples</id>
-    <parent>unit-ex-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-core-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>CORE</default>
-    </attribute>
-    <attribute>
-        <id>FRU_ID</id>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000000</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-core-venice</id>
-    <parent>unit-core-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-core-murano</id>
-    <parent>unit-core-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-core-naples</id>
-    <parent>unit-core-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pci-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>PCI</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute><id>CDM_DOMAIN</id><default>IO</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pci-venice</id>
-    <parent>unit-pci-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pci-murano</id>
-    <parent>unit-pci-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pci-naples</id>
-    <parent>unit-pci-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>enc-node-power8</id>
-    <parent>base</parent>
-    <attribute>
-        <id>CLASS</id>
-        <default>ENC</default>
-    </attribute>
-    <attribute>
-        <id>TYPE</id>
-        <default>NODE</default>
-    </attribute>
-    <attribute>
-        <id>MODEL</id>
-        <default>POWER8</default>
-    </attribute>
-    <attribute><id>FIELD_CORE_OVERRIDE</id></attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000009</default> <!-- HOSTSVC_HBEL and GARD -->
-    </attribute>
-    <attribute><id>CDM_DOMAIN</id><default>NODE</default></attribute>
-    <attribute><id>FRU_ID</id></attribute>
-    <attribute><id>TPM_PRIMARY_INFO</id></attribute>
-    <attribute><id>TPM_BACKUP_INFO</id></attribute>
-    <attribute><id>EEPROM_VPD_PRIMARY_INFO</id></attribute>
-    <attribute><id>VPD_REC_NUM</id></attribute>
-    <attribute><id>MSS_CENT_VDD_SLOPE_ACTIVE</id></attribute>
-    <attribute><id>MSS_CENT_VDD_SLOPE_INACTIVE</id></attribute>
-    <attribute><id>MSS_CENT_VDD_INTERCEPT</id></attribute>
-    <attribute><id>MSS_CENT_VCS_SLOPE_ACTIVE</id></attribute>
-    <attribute><id>MSS_CENT_VCS_SLOPE_INACTIVE</id></attribute>
-    <attribute><id>MSS_CENT_VCS_INTERCEPT</id></attribute>
-    <attribute><id>MSS_VOLT_VPP_SLOPE_POST_DRAM_INIT</id></attribute>
-    <attribute><id>MSS_VOLT_VPP_INTERCEPT_POST_DRAM_INIT</id></attribute>
-    <attribute><id>MRW_DDR3_VDDR_MAX_LIMIT_POST_DRAM_INIT</id></attribute>
-    <attribute><id>MRW_DDR4_VDDR_MAX_LIMIT_POST_DRAM_INIT</id></attribute>
-    <attribute><id>MSS_VOLT_DDR3_VDDR_SLOPE_POST_DRAM_INIT</id></attribute>
-    <attribute><id>MSS_VOLT_DDR3_VDDR_INTERCEPT_POST_DRAM_INIT</id></attribute>
-    <attribute><id>MSS_VOLT_DDR4_VDDR_SLOPE_POST_DRAM_INIT</id></attribute>
-    <attribute><id>MSS_VOLT_DDR4_VDDR_INTERCEPT_POST_DRAM_INIT</id></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-abus-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>ABUS</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute><id>CHIP_UNIT</id></attribute>
-    <attribute><id>PEER_TARGET</id></attribute>
-    <attribute><id>EI_BUS_TX_LANE_INVERT</id></attribute>
-    <attribute><id>EI_BUS_TX_MSBSWAP</id></attribute>
-    <attribute><id>IS_INTER_ENCLOSURE_BUS</id></attribute>
-    <attribute><id>PEER_PATH</id></attribute>
-    <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-abus-venice</id>
-    <parent>unit-abus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-abus-murano</id>
-    <parent>unit-abus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-abus-naples</id>
-    <parent>unit-abus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-xbus-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>XBUS</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute><id>CHIP_UNIT</id></attribute>
-    <attribute><id>PEER_TARGET</id></attribute>
-    <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-xbus-venice</id>
-    <parent>unit-xbus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-xbus-murano</id>
-    <parent>unit-xbus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-xbus-naples</id>
-    <parent>unit-xbus-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<!-- Hybrid targets -->
-
-<targetType>
-    <id>unit-l4-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>L4</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute><id>CDM_DOMAIN</id><default>MEM</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-mba-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>MBA</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute><id>MSS_DIMM_MFG_ID_CODE</id></attribute>
-    <attribute><id>EFF_DIMM_RANKS_CONFIGED</id></attribute>
-    <attribute><id>EFF_NUM_RANKS_PER_DIMM</id></attribute>
-    <attribute><id>EFF_DIMM_TYPE</id></attribute>
-    <attribute><id>EFF_CUSTOM_DIMM</id></attribute>
-    <attribute><id>EFF_DRAM_WIDTH</id></attribute>
-    <attribute><id>EFF_DRAM_GEN</id></attribute>
-    <attribute><id>EFF_PRIMARY_RANK_GROUP0</id></attribute>
-    <attribute><id>EFF_PRIMARY_RANK_GROUP1</id></attribute>
-    <attribute><id>EFF_PRIMARY_RANK_GROUP2</id></attribute>
-    <attribute><id>EFF_PRIMARY_RANK_GROUP3</id></attribute>
-    <attribute><id>EFF_SECONDARY_RANK_GROUP0</id></attribute>
-    <attribute><id>EFF_SECONDARY_RANK_GROUP1</id></attribute>
-    <attribute><id>EFF_SECONDARY_RANK_GROUP2</id></attribute>
-    <attribute><id>EFF_SECONDARY_RANK_GROUP3</id></attribute>
-    <attribute><id>EFF_TERTIARY_RANK_GROUP0</id></attribute>
-    <attribute><id>EFF_TERTIARY_RANK_GROUP1</id></attribute>
-    <attribute><id>EFF_TERTIARY_RANK_GROUP2</id></attribute>
-    <attribute><id>EFF_TERTIARY_RANK_GROUP3</id></attribute>
-    <attribute><id>EFF_QUATERNARY_RANK_GROUP0</id></attribute>
-    <attribute><id>EFF_QUATERNARY_RANK_GROUP1</id></attribute>
-    <attribute><id>EFF_QUATERNARY_RANK_GROUP2</id></attribute>
-    <attribute><id>EFF_QUATERNARY_RANK_GROUP3</id></attribute>
-    <attribute><id>EFF_CKE_MAP</id></attribute>
-    <attribute><id>EFF_SPCKE_MAP</id></attribute>
-    <attribute><id>EFF_DIMM_SPARE</id></attribute>
-<!-- TODO RTC 87603. These termination data EFF attributes have corresponding
-     VPD attributes that come from CVPD. When all HWPs are using the VPD
-     versions, these EFF versions can be deleted -->
-    <attribute><id>EFF_DRAM_RON</id></attribute>
-    <attribute><id>EFF_DRAM_RTT_NOM</id></attribute>
-    <attribute><id>EFF_DRAM_RTT_WR</id></attribute>
-    <attribute><id>EFF_ODT_RD</id></attribute>
-    <attribute><id>EFF_ODT_WR</id></attribute>
-    <attribute><id>EFF_DRAM_WR_VREF</id></attribute>
-    <attribute><id>EFF_DRAM_WRDDR4_VREF</id></attribute>
-    <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_DQ_DQS</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_ADDR</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_CNTL</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_CLK</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_SPCKE</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_DQ_DQS</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_ADDR</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_CLK</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_SPCKE</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_CNTL</id></attribute>
-    <attribute><id>EFF_CEN_RD_VREF</id></attribute>
-<!-- TODO RTC 87603. Down to here -->
-    <attribute><id>EFF_CEN_RD_VREF_SCHMOO</id></attribute>
-    <attribute><id>EFF_DRAM_WR_VREF_SCHMOO</id></attribute>
-    <attribute><id>EFF_DRAM_WRDDR4_VREF_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_CLK_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_DRV_IMP_CNTL_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_DQ_DQS_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_CLK_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_SPCKE_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_ADDR_SCHMOO</id></attribute>
-    <attribute><id>EFF_CEN_SLEW_RATE_CNTL_SCHMOO</id></attribute>
-    <attribute><id>EFF_DIMM_SIZE</id></attribute>
-    <attribute><id>EFF_DRAM_BANKS</id></attribute>
-    <attribute><id>EFF_DRAM_ROWS</id></attribute>
-    <attribute><id>EFF_DRAM_COLS</id></attribute>
-    <attribute><id>EFF_DRAM_DENSITY</id></attribute>
-    <attribute><id>EFF_DRAM_TRCD</id></attribute>
-    <attribute><id>EFF_DRAM_TRRD</id></attribute>
-    <attribute><id>EFF_DRAM_TRRD_L</id></attribute>
-    <attribute><id>EFF_DRAM_TRP</id></attribute>
-    <attribute><id>EFF_DRAM_TRAS</id></attribute>
-    <attribute><id>EFF_DRAM_TRC</id></attribute>
-    <attribute><id>EFF_DRAM_TRFI</id></attribute>
-    <attribute><id>EFF_DRAM_TRFC</id></attribute>
-    <attribute><id>EFF_DRAM_TWTR</id></attribute>
-    <attribute><id>EFF_DRAM_TWTR_L</id></attribute>
-    <attribute><id>EFF_DRAM_TRTP</id></attribute>
-    <attribute><id>EFF_DRAM_TFAW</id></attribute>
-    <attribute><id>EFF_DRAM_BL</id></attribute>
-    <attribute><id>EFF_DRAM_CL</id></attribute>
-    <attribute><id>EFF_DRAM_AL</id></attribute>
-    <attribute><id>EFF_DRAM_CWL</id></attribute>
-    <attribute><id>EFF_DRAM_RBT</id></attribute>
-    <attribute><id>EFF_DRAM_TM</id></attribute>
-    <attribute><id>EFF_DRAM_DLL_RESET</id></attribute>
-    <attribute><id>EFF_DRAM_WR</id></attribute>
-    <attribute><id>EFF_DRAM_DLL_PPD</id></attribute>
-    <attribute><id>EFF_DRAM_DLL_ENABLE</id></attribute>
-    <attribute><id>EFF_DRAM_TDQS</id></attribute>
-    <attribute><id>EFF_DRAM_WR_LVL_ENABLE</id></attribute>
-    <attribute><id>EFF_DRAM_OUTPUT_BUFFER</id></attribute>
-    <attribute><id>EFF_DRAM_PASR</id></attribute>
-    <attribute><id>EFF_DRAM_ASR</id></attribute>
-    <attribute><id>EFF_DRAM_SRT</id></attribute>
-    <attribute><id>EFF_MPR_LOC</id></attribute>
-    <attribute><id>EFF_MPR_MODE</id></attribute>
-    <attribute><id>EFF_DIMM_RCD_CNTL_WORD_0_15</id></attribute>
-    <attribute><id>EFF_DIMM_RCD_IBT</id></attribute>
-    <attribute><id>EFF_DIMM_RCD_MIRROR_MODE</id></attribute>
-    <attribute><id>EFF_SCHMOO_MODE</id></attribute>
-    <attribute><id>EFF_SCHMOO_ADDR_MODE</id></attribute>
-    <attribute><id>EFF_SCHMOO_TEST_VALID</id></attribute>
-    <attribute><id>EFF_SCHMOO_PARAM_VALID</id></attribute>
-    <attribute><id>EFF_SCHMOO_WR_EYE_MIN_MARGIN</id></attribute>
-    <attribute><id>EFF_SCHMOO_RD_EYE_MIN_MARGIN</id></attribute>
-    <attribute><id>EFF_SCHMOO_DQS_CLK_MIN_MARGIN</id></attribute>
-    <attribute><id>EFF_SCHMOO_RD_GATE_MIN_MARGIN</id></attribute>
-    <attribute><id>EFF_SCHMOO_ADDR_CMD_MIN_MARGIN</id></attribute>
-    <attribute><id>EFF_MEMCAL_INTERVAL</id></attribute>
-    <attribute><id>EFF_ZQCAL_INTERVAL</id></attribute>
-    <attribute><id>EFF_IBM_TYPE</id></attribute>
-    <attribute><id>EFF_NUM_DROPS_PER_PORT</id></attribute>
-    <attribute><id>EFF_STACK_TYPE</id></attribute>
-    <attribute><id>EFF_NUM_MASTER_RANKS_PER_DIMM</id></attribute>
-    <attribute><id>EFF_NUM_PACKAGES_PER_RANK</id></attribute>
-    <attribute><id>EFF_NUM_DIES_PER_PACKAGE</id></attribute>
-    <attribute><id>MSS_MEM_THROTTLE_NUMERATOR_PER_MBA</id></attribute>
-    <attribute><id>MSS_MEM_THROTTLE_DENOMINATOR</id></attribute>
-    <attribute><id>MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP</id></attribute>
-    <attribute><id>MSS_MEM_WATT_TARGET</id></attribute>
-    <attribute><id>MSS_POWER_SLOPE</id></attribute>
-    <attribute><id>MSS_POWER_SLOPE2</id></attribute>
-    <attribute><id>MSS_POWER_INT</id></attribute>
-    <attribute><id>MSS_POWER_INT2</id></attribute>
-    <attribute><id>MSS_TOTAL_POWER_SLOPE</id></attribute>
-    <attribute><id>MSS_TOTAL_POWER_SLOPE2</id></attribute>
-    <attribute><id>MSS_TOTAL_POWER_INT</id></attribute>
-    <attribute><id>MSS_TOTAL_POWER_INT2</id></attribute>
-    <attribute><id>MSS_DIMM_MAXBANDWIDTH_GBS</id></attribute>
-    <attribute><id>MSS_DIMM_MAXBANDWIDTH_MRS</id></attribute>
-    <attribute><id>MSS_CHANNEL_MAXBANDWIDTH_GBS</id></attribute>
-    <attribute><id>MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS</id></attribute>
-    <attribute><id>MSS_CHANNEL_MAXBANDWIDTH_MRS</id></attribute>
-    <attribute><id>MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS</id></attribute>
-    <attribute><id>MSS_DIMM_MAXPOWER</id></attribute>
-    <attribute><id>MSS_CHANNEL_MAXPOWER</id></attribute>
-    <attribute><id>MSS_CHANNEL_PAIR_MAXPOWER</id></attribute>
-    <attribute><id>MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA</id></attribute>
-    <attribute><id>MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR</id></attribute>
-    <attribute><id>MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP</id></attribute>
-    <attribute><id>MSS_EFF_DIMM_FUNCTIONAL_VECTOR</id></attribute>
-    <attribute><id>MSS_CAL_STEP_ENABLE</id></attribute>
-    <attribute><id>MSS_SLEW_RATE_DATA</id></attribute>
-    <attribute><id>MSS_SLEW_RATE_ADR</id></attribute>
-    <attribute><id>MSS_ALLOW_SINGLE_PORT</id></attribute>
-<!-- TODO RTC 87603. These phase rotator EFF attributes have corresponding
-     VPD attributes that come from CVPD. When all HWPs are using the VPD
-     versions, these EFF versions can be deleted -->
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CLK_P0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CLK_P1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CLK_P0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CLK_P1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A2</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A3</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A4</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A5</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A6</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A7</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A8</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A9</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A10</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A11</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A12</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A13</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A14</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_A15</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_BA0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_BA1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_BA2</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_CASN</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_RASN</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_CMD_WEN</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_PAR</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M_ACTN</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE2</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE3</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN2</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN3</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_ODT0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M0_CNTL_ODT1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE2</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE3</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN1</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN2</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN3</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_ODT0</id></attribute>
-    <attribute><id>EFF_CEN_PHASE_ROT_M1_CNTL_ODT1</id></attribute>
-<!-- TODO RTC 87603. Down to here -->
-    <attribute><id>MSS_DQS_SWIZZLE_TYPE</id></attribute>
-    <attribute><id>MCBIST_PATTERN</id></attribute>
-    <attribute><id>MCBIST_TEST_TYPE</id></attribute>
-    <attribute><id>MCBIST_ADDR_MODES</id></attribute>
-    <attribute><id>MCBIST_RANK</id></attribute>
-    <attribute><id>MCBIST_START_ADDR</id></attribute>
-    <attribute><id>MCBIST_END_ADDR</id></attribute>
-    <attribute><id>MCBIST_ERROR_CAPTURE</id></attribute>
-    <attribute><id>MCBIST_MAX_TIMEOUT</id></attribute>
-    <attribute><id>MCBIST_PRINT_PORT</id></attribute>
-    <attribute><id>MCBIST_STOP_ON_ERROR</id></attribute>
-    <attribute><id>MCBIST_DATA_SEED</id></attribute>
-    <attribute><id>MCBIST_ADDR_INTER</id></attribute>
-    <attribute><id>MCBIST_ADDR_NUM_ROWS</id></attribute>
-    <attribute><id>MCBIST_ADDR_NUM_COLS</id></attribute>
-    <attribute><id>MCBIST_ADDR_RANK</id></attribute>
-    <attribute><id>MCBIST_ADDR_BANK</id></attribute>
-    <attribute><id>MCBIST_ADDR_SLAVE_RANK_ON</id></attribute>
-    <attribute><id>MCBIST_ADDR_STR_MAP</id></attribute>
-    <attribute><id>MCBIST_ADDR_RAND</id></attribute>
-    <attribute><id>MCBIST_PRINTING_DISABLE</id></attribute>
-    <attribute><id>MCBIST_DATA_ENABLE</id></attribute>
-    <attribute><id>MCBIST_USER_RANK</id></attribute>
-    <attribute><id>MCBIST_USER_BANK</id></attribute>
-    <attribute><id>SCHMOO_MULTIPLE_SETUP_CALL</id></attribute>
-    <attribute><id>EFF_DRAM_LPASR</id></attribute>
-    <attribute><id>EFF_MPR_PAGE</id></attribute>
-    <attribute><id>EFF_GEARDOWN_MODE</id></attribute>
-    <attribute><id>EFF_PER_DRAM_ACCESS</id></attribute>
-    <attribute><id>EFF_TEMP_READOUT</id></attribute>
-    <attribute><id>EFF_FINE_REFRESH_MODE</id></attribute>
-    <attribute><id>EFF_MPR_RD_FORMAT</id></attribute>
-    <attribute><id>EFF_MAX_POWERDOWN_MODE</id></attribute>
-    <attribute><id>EFF_TEMP_REF_RANGE</id></attribute>
-    <attribute><id>EFF_TEMP_REF_MODE</id></attribute>
-    <attribute><id>EFF_INTERNAL_VREF_MONITOR</id></attribute>
-    <attribute><id>EFF_CS_CMD_LATENCY</id></attribute>
-    <attribute><id>EFF_SELF_REF_ABORT</id></attribute>
-    <attribute><id>EFF_RD_PREAMBLE_TRAIN</id></attribute>
-    <attribute><id>EFF_RD_PREAMBLE</id></attribute>
-    <attribute><id>EFF_WR_PREAMBLE</id></attribute>
-    <attribute><id>EFF_CA_PARITY_LATENCY</id></attribute>
-    <attribute><id>EFF_CRC_ERROR_CLEAR</id></attribute>
-    <attribute><id>EFF_CA_PARITY_ERROR_STATUS</id></attribute>
-    <attribute><id>EFF_ODT_INPUT_BUFF</id></attribute>
-    <attribute><id>EFF_RTT_PARK</id></attribute>
-    <attribute><id>EFF_CA_PARITY</id></attribute>
-    <attribute><id>EFF_DATA_MASK</id></attribute>
-    <attribute><id>EFF_WRITE_DBI</id></attribute>
-    <attribute><id>EFF_READ_DBI</id></attribute>
-    <attribute><id>EFF_VREF_DQ_TRAIN_VALUE</id></attribute>
-    <attribute><id>EFF_VREF_DQ_TRAIN_RANGE</id></attribute>
-    <attribute><id>EFF_VREF_DQ_TRAIN_ENABLE</id></attribute>
-    <attribute><id>TCCD_L</id></attribute>
-    <attribute><id>EFF_WRITE_CRC</id></attribute>
-    <attribute><id>EFF_DRAM_2N_MODE_ENABLED</id></attribute>
-    <attribute><id>EFF_DRAM_ADDRESS_MIRRORING</id></attribute>
-    <attribute><id>EFF_RLO</id></attribute>
-    <attribute><id>EFF_WLO</id></attribute>
-    <attribute><id>EFF_GPO</id></attribute>
-    <attribute><id>EFF_CKE_PRI_MAP</id></attribute>
-    <attribute><id>EFF_CKE_PWR_MAP</id></attribute>
-    <attribute><id>EFF_RDTAG</id></attribute>
-    <attribute><id>EFF_TSYS_ADR</id></attribute>
-    <attribute><id>EFF_TSYS_DP18</id></attribute>
-    <attribute><id>EFF_DQ_WR_OFFSET</id></attribute>
-    <attribute><id>EFF_BUFFER_LATENCY</id></attribute>
-    <attribute><id>LRDIMM_MR12_REG</id></attribute>
-    <attribute><id>LRDIMM_ADDITIONAL_CNTL_WORDS</id></attribute>
-    <attribute><id>LRDIMM_RANK_MULT_MODE</id></attribute>
-    <attribute><id>EFF_CRC_WR_LATENCY</id></attribute>
-    <attribute><id>MSS_THROTTLE_CONTROL_RAS_WEIGHT</id></attribute>
-    <attribute><id>MSS_THROTTLE_CONTROL_CAS_WEIGHT</id></attribute>
-    <attribute><id>MCBIST_RANDOM_SEED_VALUE</id></attribute>
-    <attribute><id>MCBIST_RANDOM_SEED_TYPE</id></attribute>
-    <attribute><id>MSS_DATABUS_UTIL_PER_MBA</id></attribute>
-    <attribute><id>MSS_UTIL_N_PER_MBA</id></attribute>
-    <attribute><id>MSS_EFF_VPD_VERSION</id></attribute>
-    <attribute><id>CDM_DOMAIN</id><default>MEM</default></attribute>
-    <attribute><id>EFF_DIMM_RCD_CNTL_WORD_X</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC00</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC01</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC02</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC03</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC04</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC05</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC06_07</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC08</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC09</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC10</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC11</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC12</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC13</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC14</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC15</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_1x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_2x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_3x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_4x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_5x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_6x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_7x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_8x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_9x</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_Ax</id></attribute>
-    <attribute><id>EFF_DIMM_DDR4_RC_Bx</id></attribute>
-    <attribute><id>EFF_DRAM_TCCD_L</id></attribute>
-    <attribute><id>EFF_DRAM_TCCD_S</id></attribute>
-    <attribute><id>EFF_LRDIMM_WORD_X</id></attribute>
-    <attribute><id>EFF_LRDIMM_ADDITIONAL_CNTL_WORDS</id></attribute>
-    <attribute><id>MCBIST_DDR4_PDA_ENABLE</id></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-mcs-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>MCS</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000003</default> <!--GARD | MEMDIAG -->
-    </attribute>
-    <attribute><id>IBSCOM_MCS_BASE_ADDR</id></attribute>
-    <attribute><id>EI_BUS_TX_LANE_INVERT</id></attribute>
-    <attribute><id>DMI_REFCLOCK_SWIZZLE</id></attribute>
-    <attribute><id>EI_BUS_TX_MSBSWAP</id></attribute>
-    <attribute><id>DMI_DFE_OVERRIDE</id></attribute>
-    <attribute><id>CDM_DOMAIN</id><default>MEM</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-mcs-venice</id>
-    <parent>unit-mcs-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-mcs-murano</id>
-    <parent>unit-mcs-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-mcs-naples</id>
-    <parent>unit-mcs-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<!-- Processor target types -->
-
-<targetType>
-    <id>unit-mba-venice</id>
-    <parent>unit-mba-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-mba-murano</id>
-    <parent>unit-mba-venice</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-mba-naples</id>
-    <parent>unit-mba-venice</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
 <!-- Memory Buffer Target Types -->
 
 <!-- Centaur chip/DMI -->
@@ -1628,37 +461,6 @@
     <attribute><id>MSS_VREF_CAL_CNTL</id></attribute>
 </targetType>
 
-<!-- Centaur L4 -->
-
-<targetType>
-    <id>unit-l4-centaur</id>
-    <parent>unit-l4-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>CENTAUR</default>
-    </attribute>
-</targetType>
-
-<!-- Centaur MBA -->
-
-<targetType>
-    <id>unit-mba-centaur</id>
-    <parent>unit-mba-power8</parent>
-    <attribute>
-        <id>PRIMARY_CAPABILITIES</id>
-        <default>
-            <field><id>supportsFsiScom</id><value>1</value></field>
-            <field><id>supportsXscom</id><value>0</value></field>
-            <field><id>supportsInbandScom</id><value>1</value></field>
-            <field><id>reserved</id><value>0</value></field>
-        </default>
-    </attribute>
-    <attribute>
-        <id>MODEL</id>
-        <default>CENTAUR</default>
-    </attribute>
-</targetType>
-
 <!--Dummy card to use as a DIMM for initial I2C/EEPROM testing -->
 <targetType>
     <id>card</id>
@@ -1718,156 +520,6 @@
 </targetType>
 
 <targetType>
-    <id>unit-nx-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>NX</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute>
-        <id>PRIMARY_CAPABILITIES</id>
-        <default>
-            <field><id>supportsFsiScom</id><value>0</value></field>
-            <field><id>supportsXscom</id><value>0</value></field>
-            <field><id>supportsInbandScom</id><value>0</value></field>
-            <field><id>reserved</id><value>0</value></field>
-        </default>
-    </attribute>
-    <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-nx-venice</id>
-    <parent>unit-nx-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-nx-murano</id>
-    <parent>unit-nx-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-nx-naples</id>
-    <parent>unit-nx-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pore-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>PORE</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute>
-        <id>PRIMARY_CAPABILITIES</id>
-        <default>
-            <field><id>supportsFsiScom</id><value>0</value></field>
-            <field><id>supportsXscom</id><value>0</value></field>
-            <field><id>supportsInbandScom</id><value>0</value></field>
-            <field><id>reserved</id><value>0</value></field>
-        </default>
-    </attribute>
-    <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pore-venice</id>
-    <parent>unit-pore-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pore-murano</id>
-    <parent>unit-pore-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-pore-naples</id>
-    <parent>unit-pore-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-capp-power8</id>
-    <parent>unit</parent>
-    <attribute>
-        <id>TYPE</id>
-        <default>CAPP</default>
-    </attribute>
-    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
-    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
-        <default>0x00000001</default> <!--GARD -->
-    </attribute>
-    <attribute>
-        <id>PRIMARY_CAPABILITIES</id>
-        <default>
-            <field><id>supportsFsiScom</id><value>0</value></field>
-            <field><id>supportsXscom</id><value>0</value></field>
-            <field><id>supportsInbandScom</id><value>0</value></field>
-            <field><id>reserved</id><value>0</value></field>
-        </default>
-    </attribute>
-    <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute>
-</targetType>
-
-<targetType>
-    <id>unit-capp-venice</id>
-    <parent>unit-capp-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>VENICE</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-capp-murano</id>
-    <parent>unit-capp-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>MURANO</default>
-    </attribute>
-</targetType>
-
-<targetType>
-    <id>unit-capp-naples</id>
-    <parent>unit-capp-power8</parent>
-    <attribute>
-        <id>MODEL</id>
-        <default>NAPLES</default>
-    </attribute>
-</targetType>
-
-<targetType>
     <id>occ</id>
     <parent>unit</parent>
     <attribute>
@@ -1876,7 +528,7 @@
     </attribute>
     <attribute>
         <id>MODEL</id>
-        <default>POWER8</default>
+        <default>POWER9</default>
     </attribute>
     <attribute>
         <id>OCC_MASTER_CAPABLE</id>
@@ -1905,6 +557,18 @@
         <id>PHYS_PATH</id>
         <default>physical:sys-0</default>
     </attribute>
+    <attribute><id>SCRATCH_UINT8_1</id></attribute>
+    <attribute><id>SCRATCH_UINT8_2</id></attribute>
+    <attribute><id>SCRATCH_UINT32_1</id></attribute>
+    <attribute><id>SCRATCH_UINT32_2</id></attribute>
+    <attribute><id>SCRATCH_UINT64_1</id></attribute>
+    <attribute><id>SCRATCH_UINT64_2</id></attribute>
+    <attribute><id>SCRATCH_UINT8_ARRAY_1</id></attribute>
+    <attribute><id>SCRATCH_UINT8_ARRAY_2</id></attribute>
+    <attribute><id>SCRATCH_UINT32_ARRAY_1</id></attribute>
+    <attribute><id>SCRATCH_UINT32_ARRAY_2</id></attribute>
+    <attribute><id>SCRATCH_UINT64_ARRAY_1</id></attribute>
+    <attribute><id>SCRATCH_UINT64_ARRAY_2</id></attribute>
     <attribute>
         <id>AFFINITY_PATH</id>
         <default>affinity:sys-0</default>
@@ -2265,7 +929,6 @@
     <attribute><id>PROC_PCIE_IOP_ZCAL_CONTROL</id></attribute>
     <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN1</id></attribute>
     <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute>
     <attribute><id>PROC_PCIE_PHB_ACTIVE</id></attribute>
     <attribute><id>PROC_HTM_BAR_SIZE</id></attribute>
     <attribute><id>XSCOM_BASE_ADDRESS</id></attribute>
@@ -2300,6 +963,7 @@
     <attribute><id>PROC_FABRIC_A_AGGREGATE</id></attribute>
     <!-- End proc_fbc_eff_config_links -->
     <attribute><id>FSI_GP_SHADOWS_OVERWRITE</id></attribute>
+    <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute>
 </targetType>
 
 <!-- chip-processor-nimbus -->
@@ -2981,6 +1645,7 @@
     <attribute><id>PROC_PCIE_IOP_ZCAL_CONTROL_P9</id></attribute>
     <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN1_P9</id></attribute>
     <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2_P9</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute>
     <attribute><id>CDM_DOMAIN</id><default>IO</default></attribute>
 </targetType>