Updates for P9 NX DD2 initfiles

Change-Id: I811890df85ad59929c2ace02f9fe09b9fa3feb90
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38549
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38599
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

2 files changed, 106 insertions, 68 deletions

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C
index edb11ed65..a87326d97 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_nx_scom.C
@@ -52,6 +52,8 @@ fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
         FAPI_TRY(FAPI_ATTR_GET_PRIVILEGED(fapi2::ATTR_EC, TGT0, l_chip_ec));
         fapi2::ATTR_CHIP_EC_FEATURE_HW403701_Type l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701;
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW403701, TGT0, l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701));
+        fapi2::ATTR_PROC_FABRIC_PUMP_MODE_Type l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_PUMP_MODE, TGT1, l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE));
         fapi2::buffer<uint64_t> l_scom_buffer;
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x2011041ull, l_scom_buffer ));
@@ -71,18 +73,23 @@ fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x2011042ull, l_scom_buffer ));
 
-            constexpr auto l_NX_DMA_EFTCOMP_MAX_INRD_MAX_13_INRD = 0xd;
-            l_scom_buffer.insert<33, 4, 60, uint64_t>(l_NX_DMA_EFTCOMP_MAX_INRD_MAX_13_INRD );
-            constexpr auto l_NX_DMA_EFTDECOMP_MAX_INRD_MAX_7_INRD = 0x7;
-            l_scom_buffer.insert<37, 4, 60, uint64_t>(l_NX_DMA_EFTDECOMP_MAX_INRD_MAX_7_INRD );
-            constexpr auto l_NX_DMA_GZIPCOMP_MAX_INRD_MAX_13_INRD = 0xd;
-            l_scom_buffer.insert<8, 4, 60, uint64_t>(l_NX_DMA_GZIPCOMP_MAX_INRD_MAX_13_INRD );
-            constexpr auto l_NX_DMA_GZIPDECOMP_MAX_INRD_MAX_7_INRD = 0x7;
-            l_scom_buffer.insert<12, 4, 60, uint64_t>(l_NX_DMA_GZIPDECOMP_MAX_INRD_MAX_7_INRD );
+            constexpr auto l_NX_DMA_EFTCOMP_MAX_INRD_MAX_15_INRD = 0xf;
+            l_scom_buffer.insert<33, 4, 60, uint64_t>(l_NX_DMA_EFTCOMP_MAX_INRD_MAX_15_INRD );
+            constexpr auto l_NX_DMA_EFTDECOMP_MAX_INRD_MAX_15_INRD = 0xf;
+            l_scom_buffer.insert<37, 4, 60, uint64_t>(l_NX_DMA_EFTDECOMP_MAX_INRD_MAX_15_INRD );
+            constexpr auto l_NX_DMA_GZIPCOMP_MAX_INRD_MAX_15_INRD = 0xf;
+            l_scom_buffer.insert<8, 4, 60, uint64_t>(l_NX_DMA_GZIPCOMP_MAX_INRD_MAX_15_INRD );
+            constexpr auto l_NX_DMA_GZIPDECOMP_MAX_INRD_MAX_15_INRD = 0xf;
+            l_scom_buffer.insert<12, 4, 60, uint64_t>(l_NX_DMA_GZIPDECOMP_MAX_INRD_MAX_15_INRD );
             constexpr auto l_NX_DMA_SYM_MAX_INRD_MAX_3_INRD = 0x3;
             l_scom_buffer.insert<25, 4, 60, uint64_t>(l_NX_DMA_SYM_MAX_INRD_MAX_3_INRD );
-            constexpr auto l_NX_DMA_SYM_CPB_CHECK_DISABLE_ON = 0x1;
-            l_scom_buffer.insert<48, 1, 63, uint64_t>(l_NX_DMA_SYM_CPB_CHECK_DISABLE_ON );
+
+            if (((l_chip_id == 0x5) && (l_chip_ec == 0x10)) )
+            {
+                constexpr auto l_NX_DMA_SYM_CPB_CHECK_DISABLE_ON = 0x1;
+                l_scom_buffer.insert<48, 1, 63, uint64_t>(l_NX_DMA_SYM_CPB_CHECK_DISABLE_ON );
+            }
+
             constexpr auto l_NX_DMA_EFT_COMP_PREFETCH_ENABLE_ON = 0x1;
             l_scom_buffer.insert<23, 1, 63, uint64_t>(l_NX_DMA_EFT_COMP_PREFETCH_ENABLE_ON );
             constexpr auto l_NX_DMA_EFT_DECOMP_PREFETCH_ENABLE_ON = 0x1;
@@ -252,20 +259,20 @@ fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
                 l_scom_buffer.insert<31, 1, 63, uint64_t>(literal_0b1 );
             }
 
-            if (l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701)
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701 == literal_1))
             {
                 l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b1 );
             }
-            else if (literal_1)
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701 != literal_1))
             {
                 l_scom_buffer.insert<32, 1, 63, uint64_t>(literal_0b0 );
             }
 
-            if (l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701)
+            if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701 == literal_1))
             {
                 l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b1 );
             }
-            else if (literal_1)
+            else if ((l_TGT0_ATTR_CHIP_EC_FEATURE_HW403701 != literal_1))
             {
                 l_scom_buffer.insert<33, 1, 63, uint64_t>(literal_0b0 );
             }
@@ -451,6 +458,17 @@ fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
         {
             FAPI_TRY(fapi2::getScom( TGT0, 0x2011095ull, l_scom_buffer ));
 
+            if ((l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_GROUP))
+            {
+                constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_SKIP_G_ON = 0x1;
+                l_scom_buffer.insert<24, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_SKIP_G_ON );
+            }
+            else if ((l_TGT1_ATTR_PROC_FABRIC_PUMP_MODE == fapi2::ENUM_ATTR_PROC_FABRIC_PUMP_MODE_CHIP_IS_NODE))
+            {
+                constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_SKIP_G_OFF = 0x0;
+                l_scom_buffer.insert<24, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_SKIP_G_OFF );
+            }
+
             constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_RD_GO_M_QOS_ON = 0x1;
             l_scom_buffer.insert<22, 1, 63, uint64_t>(l_NX_PBI_CQ_WRAP_NXCQ_SCOM_RD_GO_M_QOS_ON );
             constexpr auto l_NX_PBI_CQ_WRAP_NXCQ_SCOM_ADDR_BAR_MODE_OFF = 0x0;
@@ -498,6 +516,8 @@ fapi2::ReturnCode p9_nx_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
             FAPI_TRY(fapi2::getScom( TGT0, 0x20110d6ull, l_scom_buffer ));
 
             l_scom_buffer.insert<9, 3, 61, uint64_t>(literal_2 );
+            constexpr auto l_NX_PBI_DISABLE_PROMOTE_ON = 0x1;
+            l_scom_buffer.insert<6, 1, 63, uint64_t>(l_NX_PBI_DISABLE_PROMOTE_ON );
             FAPI_TRY(fapi2::putScom(TGT0, 0x20110d6ull, l_scom_buffer));
         }
         {
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 4bdcb1362..a148fcb8c 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -2510,7 +2510,77 @@
       </chip>
     </chipEcFeature>
   </attribute>
-
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_P9N_NX_DD1</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Returns true if dd1.
+      Less than Nimbus ec 0x20
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW403701</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+      Nimbus DD1: Reduce rng pace from 2000->300 to work around grant unfairness
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW406130</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+        Nimbus DD1: Reduce number of active DMA read requests down from 16->8
+        to work around erat access count bug
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_HW401552</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+        Nimbus DD1: Workaround clockgating bug with APC machines missing deassert
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_NIMBUS</name>
+        <ec>
+          <value>0x20</value>
+          <test>LESS_THAN</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ********************************************************************* -->
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW403585</id>>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
@@ -2545,7 +2615,7 @@
       </chip>
     </chipEcFeature>
   </attribute>
-
+  <!-- ******************************************************************** -->
   <attribute>
     <id>ATTR_CHIP_EC_FEATURE_NDD1_ABIST_PARALLEL</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
@@ -3039,58 +3109,6 @@
   </attribute>
 
   <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW403701</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-      Nimbus DD1: Reduce rng pace from 2000->300 to work around grant unfairness
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NIMBUS</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW406130</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Nimbus DD1: Reduce number of active DMA read requests down from 16->8
-        to work around erat access count bug
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NIMBUS</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
-    <id>ATTR_CHIP_EC_FEATURE_HW401552</id>
-    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
-    <description>
-        Nimbus DD1: Workaround clockgating bug with APC machines missing deassert
-    </description>
-    <chipEcFeature>
-      <chip>
-        <name>ENUM_ATTR_NAME_NIMBUS</name>
-        <ec>
-          <value>0x20</value>
-          <test>LESS_THAN</test>
-        </ec>
-      </chip>
-    </chipEcFeature>
-  </attribute>
-
-  <attribute>
     <id>ATTR_CHIP_EC_FEATURE_HW389045</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>