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| author | Andre Marin <aamarin@us.ibm.com> | 2017-09-05 11:04:23 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-07 14:13:28 -0400 |
| commit | 15dacd71c6ce698c461a3523ea521212783f6ff4 (patch) | |
| tree | 38230e2c3c24e2eb9a0467b469feedb0b96bdae6 | |
| parent | 18e9580bd64017de0999afea179125fd704b1db2 (diff) | |
| download | talos-hostboot-15dacd71c6ce698c461a3523ea521212783f6ff4.tar.gz talos-hostboot-15dacd71c6ce698c461a3523ea521212783f6ff4.zip | |
Remove logic to disable memory clocks in STR if in PD_AND_STR_CLK_STOP mode
Do not disable memory clocks when in STR if power control mode
PD_AND_STR_CLK_STOP (ie. treat it the same as PD_AND_STR).
Removing EC Chip level check since there isn't a current plan
for a RIT fix.
Change-Id: I298561c39a2419ed7f92e90c9eeaf8924fc412bc
CQ:HW416315
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45653
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45656
3 files changed, 0 insertions, 48 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C index 2fe69479e..7bb76fe33 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.C @@ -160,13 +160,6 @@ fapi2::ReturnCode set_str_reg(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_tar break; } - // MCA_MBASTR0Q_CFG_DIS_CLK_IN_STR: Set to 1 for PD_AND_STR_CLK_STOP, otherwise clear the bit - // Only for DD2.0 and above, will not work for DD1.* HW - if( !chip_ec_feature_mss_dis_clk_in_str(i_target) ) - { - l_data.writeBit<MCA_MBASTR0Q_CFG_DIS_CLK_IN_STR>(l_str_enable == PD_AND_STR_CLK_STOP); - } - l_data.insertFromRight<TT::ENTER_STR_TIME_POS, TT::ENTER_STR_TIME_LEN>(ENTER_STR_TIME); FAPI_TRY(mss::putScom(i_target, MCA_MBASTR0Q, l_data), "Error in set_str_reg" ); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H index 494d53435..89a37afeb 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors_manual.H @@ -459,29 +459,6 @@ fapi_try_exit: return false; } -/// -/// @brief ATTR_CHIP_EC_FEATURE_MSS_DIS_CLK_IN_STR getter -/// @tparam T the fapi2 target type of the target -/// @param[in] const ref to the target -/// @return bool true iff we're on a Nimbus < EC 2.0 -/// -template< fapi2::TargetType T > -inline bool chip_ec_feature_mss_dis_clk_in_str(const fapi2::Target<T>& i_target) -{ - const auto l_chip = mss::find_target<fapi2::TARGET_TYPE_PROC_CHIP>(i_target); - - uint8_t l_value = 0; - FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_MSS_DIS_CLK_IN_STR, l_chip, l_value) ); - - return l_value != 0; - -fapi_try_exit: - FAPI_ERR("failed accessing ATTR_CHIP_EC_FEATURE_MSS_DIS_CLK_IN_STR: 0x%lx (target: %s)", - uint64_t(fapi2::current_err), mss::c_str(i_target)); - fapi2::Assert(false); - return false; -} - } // close mss namespace #endif diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 895d075ff..b4d29c8e9 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -4310,24 +4310,6 @@ </attribute> <attribute> - <id>ATTR_CHIP_EC_FEATURE_MSS_DIS_CLK_IN_STR</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Only set the disable memory clock stop when in STR for DD2.* - Doesn't work for DD1.* - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x20</value> - <test>LESS_THAN</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - - <attribute> <id>ATTR_CHIP_EC_FEATURE_MSS_PERIODICS</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> |
