diff options
| author | Chris Steffen <cwsteffen@us.ibm.com> | 2017-05-19 08:02:12 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-05-22 23:50:37 -0400 |
| commit | 15024cecd90e616624fe4bb2ea6fb33540d85683 (patch) | |
| tree | 21c52049db2840d35fd60f2ef9faa35d70e73658 | |
| parent | d0009e276c337309930390e56f20ce1e41916dc8 (diff) | |
| download | talos-hostboot-15024cecd90e616624fe4bb2ea6fb33540d85683.tar.gz talos-hostboot-15024cecd90e616624fe4bb2ea6fb33540d85683.zip | |
IO Xbus RAS Update
- Changed callouts to 'bus' callouts
- Changed callouts to high priority
Change-Id: I5a834cb3285330159449fb811cff2caa6c20d03a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40751
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Gary A. Peterson <garyp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40752
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/io/p9_io_xbus_post_trainadv.C | 10 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_io_xbus_errors.xml | 26 |
2 files changed, 18 insertions, 18 deletions
diff --git a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_post_trainadv.C b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_post_trainadv.C index 149447fac..c824a7de2 100644 --- a/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_post_trainadv.C +++ b/src/import/chips/p9/procedures/hwp/io/p9_io_xbus_post_trainadv.C @@ -73,7 +73,8 @@ fapi2::ReturnCode getDebugInfo( } fapi2::ReturnCode checkEyeWidth( - const fapi2::Target<fapi2::TARGET_TYPE_XBUS> i_tgt, + const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& i_tgt, + const fapi2::Target<fapi2::TARGET_TYPE_XBUS>& i_ctgt, const uint8_t i_grp ) { FAPI_IMP("Entering..."); @@ -110,7 +111,8 @@ fapi2::ReturnCode checkEyeWidth( // Check if the historical eye width is less then the manufacturing minimum eye width FAPI_ASSERT( ( io::get( EDIP_RX_HIST_MIN_EYE_WIDTH, data64 ) >= minMfgEyeWidth ), - fapi2::IO_XBUS_MFG_RX_EYE_WIDTH_FAILURE().set_TARGET( i_tgt ).set_GROUP( i_grp ) + fapi2::IO_XBUS_MFG_RX_EYE_WIDTH_FAILURE().set_RXTARGET(i_tgt) + .set_TXTARGET(i_ctgt).set_GROUP(i_grp) .set_EYE_WIDTH( io::get( EDIP_RX_HIST_MIN_EYE_WIDTH, data64 ) ) .set_EYE_WIDTH_LANE( io::get( EDIP_RX_HIST_MIN_EYE_WIDTH_LANE, data64 ) ) .set_EYE_WIDTH_VALID( io::get( EDIP_RX_HIST_MIN_EYE_WIDTH_VALID, data64 ) ) @@ -160,8 +162,8 @@ fapi2::ReturnCode p9_io_xbus_post_trainadv( if(l_status == fapi2::ENUM_ATTR_IO_X_MFG_CHK_TRUE) { - FAPI_TRY( checkEyeWidth( i_tgt, i_grp ) ); - FAPI_TRY( checkEyeWidth( i_ctgt, i_cgrp ) ); + FAPI_TRY( checkEyeWidth( i_tgt, i_ctgt, i_grp ) ); + FAPI_TRY( checkEyeWidth( i_ctgt, i_tgt, i_cgrp ) ); } diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_io_xbus_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_io_xbus_errors.xml index f28d30759..95eabf1be 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_io_xbus_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_io_xbus_errors.xml @@ -43,7 +43,7 @@ <description>I/O EDI+ Xbus Rx Dccal(Offset calibration) Timeout</description> <callout> <target>TARGET</target> - <priority>MEDIUM</priority> + <priority>HIGH</priority> </callout> <deconfigure> <target>TARGET</target> @@ -60,7 +60,7 @@ <description>I/O EDI+ Xbus Rx Dccal Cleanup Pll Not Locked</description> <callout> <target>TARGET</target> - <priority>MEDIUM</priority> + <priority>HIGH</priority> </callout> <deconfigure> <target>TARGET</target> @@ -80,14 +80,20 @@ <ffdc>MIN_EYE_WIDTH</ffdc> <description>I/O EDI+ Xbus Rx Eye Width Failure</description> <callout> - <target>TARGET</target> - <priority>MEDIUM</priority> + <bus>TXTARGET,RXTARGET</bus> + <priority>HIGH</priority> </callout> <deconfigure> - <target>TARGET</target> + <target>RXTARGET</target> + </deconfigure> + <deconfigure> + <target>TXTARGET</target> </deconfigure> <gard> - <target>TARGET</target> + <target>RXTARGET</target> + </gard> + <gard> + <target>TXTARGET</target> </gard> </hwpError> <!-- *********************************************************************** --> @@ -160,14 +166,6 @@ <ffdc>S_BAD_LANE_CODE</ffdc> <!-- Slave Func Mode Info --> <callout> - <target>M_TARGET</target> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>S_TARGET</target> - <priority>MEDIUM</priority> - </callout> - <callout> <bus>M_TARGET,S_TARGET</bus> <priority>HIGH</priority> </callout> |
