Fix PVR check for Nimbus DD1

Added check for bit 18 to distinguish between Nimbus DD1.0 and
Cumulus DD1.0
Consolidated Nimbus DD1 checking to a common function
Added printk output that shows which CPU we're running on
Modified some existing printk output to use fewer characters

Change-Id: I1c42df0051fc2d9cc5fa54d95f68c3bd26b86462
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39876
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

8 files changed, 41 insertions, 12 deletions

diff --git a/src/include/arch/pvrformat.H b/src/include/arch/pvrformat.H
index 0e1c462b8..2559ce997 100644
--- a/src/include/arch/pvrformat.H
+++ b/src/include/arch/pvrformat.H
@@ -113,8 +113,8 @@ struct PVR_t
      */
     enum
     {
-        CHIP_DD_MASK  = 0x00FF0F0F,
-        IS_NIMBUS_DD1 = 0x004E0100,
+        NIMBUS_DD1_MASK = 0x00FF2F0F,
+        IS_NIMBUS_DD1   = 0x004E0100,
 
         // Field: chipType
         NIMBUS_CHIP = 0,
@@ -132,6 +132,14 @@ struct PVR_t
         P8_VENICE = 0x4D,
         P9_ALL    = 0x4E,
     };
+
+    /**
+     * @brief Return Major.Minor DD level
+     * @return 8-bit DD level
+     */
+    inline bool isNimbusDD1() {
+        return ((word & NIMBUS_DD1_MASK) == IS_NIMBUS_DD1);
+    }
 };
 
 #endif //_PVRFORMAT_H
diff --git a/src/include/sys/misc.h b/src/include/sys/misc.h
index cfe62c7d3..cf8b6a93b 100644
--- a/src/include/sys/misc.h
+++ b/src/include/sys/misc.h
@@ -138,6 +138,12 @@ enum ProcessorCoreType
     CORE_UNKNOWN,
 };
 
+/**
+ * Strings for ProcessorCoreType
+ *   declared in misc.C
+ */
+extern const char* ProcessorCoreTypeStrings[CORE_UNKNOWN+1];
+
 /** @fn cpu_core_type()
  *  @brief Determine the procesore core type.
  *
diff --git a/src/kernel/cpuid.C b/src/kernel/cpuid.C
index f65612ae1..8d3555eed 100644
--- a/src/kernel/cpuid.C
+++ b/src/kernel/cpuid.C
@@ -49,7 +49,7 @@ namespace CpuID
             case PVR_t::P9_ALL:
             {
                 // Nimbus DD1.0 has a different PVR format
-                if( (l_pvr.word & PVR_t::CHIP_DD_MASK) == PVR_t::IS_NIMBUS_DD1)
+                if( l_pvr.isNimbusDD1() )
                 {
                     return CORE_POWER9_NIMBUS;
                 }
diff --git a/src/kernel/kernel.C b/src/kernel/kernel.C
index f470723ce..b14181caf 100644
--- a/src/kernel/kernel.C
+++ b/src/kernel/kernel.C
@@ -40,6 +40,7 @@
 #include <util/align.H>
 #include <securerom/sha512.H>
 #include <kernel/bltohbdatamgr.H>
+#include <kernel/cpuid.H>
 
 #include <stdlib.h>
 
@@ -47,6 +48,7 @@ extern "C" void kernel_dispatch_task();
 extern void* init_main(void* unused);
 extern uint64_t kernel_other_thread_spinlock;
 
+
 class Kernel
 {
     public:
@@ -63,6 +65,8 @@ extern "C"
 int main()
 {
     printk("Booting %s kernel...\n\n", "Hostboot");
+    printk("CPU=%s\n",
+           ProcessorCoreTypeStrings[CpuID::getCpuType()]);
 
     // Erase task-pointer so that TaskManager::getCurrentTask() returns NULL.
     setSPRG3(NULL);
@@ -76,7 +80,7 @@ int main()
 
     if ( Bootloader::BlToHbDataValid(l_pBltoHbData) )
     {
-        printk("Valid BL to HB communication data\n");
+        printk("BL to HB comm valid\n");
 
         // Make copy of structure so to not modify original pointers
         auto l_blToHbDataCopy = *l_pBltoHbData;
@@ -112,7 +116,7 @@ int main()
     }
     else
     {
-        printk("Invalid BL to HB communication data\n");
+        printk("BL to HB commun invalid\n");
         // Force invalidation of securebootdata
         g_BlToHbDataManager.initInvalid();
     }
diff --git a/src/kernel/misc.C b/src/kernel/misc.C
index 963c0a75c..6122e40a2 100644
--- a/src/kernel/misc.C
+++ b/src/kernel/misc.C
@@ -651,3 +651,15 @@ namespace KernelMemState
     }
 
 };
+
+const char* ProcessorCoreTypeStrings[]
+{
+    "Murano",
+    "Venice",
+    "Naples",
+    "Nimbus",
+    "Cumulus",
+    "Unknown"
+};
+
+
diff --git a/src/kernel/pagemgr.C b/src/kernel/pagemgr.C
index 66f62e6da..5382dc0e0 100644
--- a/src/kernel/pagemgr.C
+++ b/src/kernel/pagemgr.C
@@ -207,7 +207,7 @@ void PageManager::_initialize()
 
     page_t* startAddr = reinterpret_cast<page_t*>(firstPageAddr());
     page_t* endAddr = reinterpret_cast<page_t*>(VmmManager::INITIAL_MEM_SIZE);
-    printk("Initializing PageManager starting at %p...", startAddr);
+    printk("PageManager starts at %p...", startAddr);
 
     // Add on secureboot data size to end of reserved space
     size_t securebootDataSize = 0;
diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C
index b70569297..081d7e144 100644
--- a/src/usr/intr/intrrp.C
+++ b/src/usr/intr/intrrp.C
@@ -426,8 +426,8 @@ errlHndl_t IntrRp::resetIntUnit(intr_hdlr_t* i_proc)
     do {
         //Anything greater than DD10 should do the HW-based reset
         bool l_doHwReset = true;
-        uint32_t l_pvr = mmio_pvr_read() & 0xFFFFFFFF;
-        if( (l_pvr & PVR_t::CHIP_DD_MASK) == PVR_t::IS_NIMBUS_DD1 )
+        PVR_t l_pvr( mmio_pvr_read() & 0xFFFFFFFF );
+        if( l_pvr.isNimbusDD1() )
         {
             l_doHwReset = false;
         }
diff --git a/src/usr/isteps/istep06/thread_activate/thread_activate.C b/src/usr/isteps/istep06/thread_activate/thread_activate.C
index 26d374ef7..100556d37 100644
--- a/src/usr/isteps/istep06/thread_activate/thread_activate.C
+++ b/src/usr/isteps/istep06/thread_activate/thread_activate.C
@@ -268,16 +268,15 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl )
 
     // set the fused core mode attribute
     bool l_smt8 = false;
-    uint32_t l_pvr = mmio_pvr_read() & 0xFFFFFFFF;
-    if( (l_pvr & PVR_t::CHIP_DD_MASK) == PVR_t::IS_NIMBUS_DD1 )
+    PVR_t l_pvr( mmio_pvr_read() & 0xFFFFFFFF );
+    if( l_pvr.isNimbusDD1() )
     {
         sys->setAttr<TARGETING::ATTR_FUSED_CORE_MODE>
                 (TARGETING::FUSED_CORE_MODE_SMT4_DEFAULT);
     }
     else
     {
-        uint32_t l_smt = (l_pvr & PVR_t::SMT_MASK) >> PVR_t::SMT_SHIFT;
-        if( l_smt == PVR_t::SMT4_MODE )
+        if( l_pvr.smt == PVR_t::SMT4_MODE )
         {
             sys->setAttr<TARGETING::ATTR_FUSED_CORE_MODE>
                 (TARGETING::FUSED_CORE_MODE_SMT4_ONLY);