diff options
author | Bill Schwartz <whs@us.ibm.com> | 2015-02-04 07:55:01 -0600 |
---|---|---|
committer | A. Patrick Williams III <iawillia@us.ibm.com> | 2015-02-12 10:43:52 -0600 |
commit | 02e8cfeafe60b5937a01d994d1dc25ec165eeece (patch) | |
tree | 1c4f82a768230681ac9a3e0d47f414fd0b045e95 | |
parent | 3eb0fabc51df77382919c3d24b0f38b8f4eb8051 (diff) | |
download | talos-hostboot-02e8cfeafe60b5937a01d994d1dc25ec165eeece.tar.gz talos-hostboot-02e8cfeafe60b5937a01d994d1dc25ec165eeece.zip |
Update i2cSetupMasters() to support different inputs
Update i2cSetupMasters similar to i2cResetActiveMasters to accept a parameter
to select procs and/or mem buffs and host and/or fsi engines.
Change-Id: I943248e01acd3254acf5635a284a05c827645123
RTC: 115834
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15552
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
-rw-r--r-- | src/include/usr/i2c/i2cif.H | 79 | ||||
-rw-r--r-- | src/include/usr/i2c/i2creasoncodes.H | 4 | ||||
-rw-r--r-- | src/usr/hwas/hostbootIstep.C | 2 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C | 5 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/slave_sbe/slave_sbe.C | 2 | ||||
-rw-r--r-- | src/usr/hwpf/hwp/start_payload/start_payload.C | 7 | ||||
-rwxr-xr-x | src/usr/i2c/i2c.C | 368 | ||||
-rwxr-xr-x | src/usr/i2c/test/i2ctest.H | 13 |
8 files changed, 231 insertions, 249 deletions
diff --git a/src/include/usr/i2c/i2cif.H b/src/include/usr/i2c/i2cif.H index c219fca29..51e3c3aad 100644 --- a/src/include/usr/i2c/i2cif.H +++ b/src/include/usr/i2c/i2cif.H @@ -33,37 +33,14 @@ namespace I2C { -/* - * @enum i2cRangeType - * - * @brief i2cRangeType is used to create function-specific enums below - */ -enum i2cRangeType -{ - I2C_RANGE_HOST = 0x01, - I2C_RANGE_FSI = 0x02, - I2C_RANGE_PROC = 0x04, - I2C_RANGE_MEMBUF = 0x08, -}; - /** - * @brief This function will handle everything required to setup the master - * engines on the processor. - * Mainly, as of current code, this is being used to write the I2C Bus - * Divisor values to the master engines to be used by Phyp. + * @enum i2cProcessType * - * @return errlHndl_t - Null if successful, otherwise a pointer to - * the error log. - */ -errlHndl_t i2cSetupMasters ( void ); - -/** - * @enum i2cResetType - * - * @brief I2C Reset Type specifies which targets and which I2C master engines - * are reset + * @brief I2C Process Type specifies which targets and which I2C master + * engines are reset or setup * * Specifically: + * * _PROC_ --> loops through the processors in the system * _MEMBUF_ --> loops through membufs in the system * @@ -74,19 +51,24 @@ errlHndl_t i2cSetupMasters ( void ); * _ALL --> combines one or more of the PROC/MEMBUF and HOST/FSI pairs * */ -enum i2cResetType +enum i2cProcessType { - I2C_RESET_INVALID = 0, + // used to create function-specific enums below + I2C_RANGE_HOST = 0x01, + I2C_RANGE_FSI = 0x02, + I2C_RANGE_PROC = 0x04, + I2C_RANGE_MEMBUF = 0x08, - I2C_RESET_PROC_HOST = I2C_RANGE_PROC | I2C_RANGE_HOST, - I2C_RESET_PROC_FSI = I2C_RANGE_PROC | I2C_RANGE_FSI, - I2C_RESET_PROC_ALL = I2C_RESET_PROC_HOST | I2C_RESET_PROC_FSI, + // external interface for i2cResetActiveMasters and i2cSetupActiveMasters + I2C_PROC_HOST = I2C_RANGE_PROC | I2C_RANGE_HOST, + I2C_PROC_FSI = I2C_RANGE_PROC | I2C_RANGE_FSI, + I2C_PROC_ALL = I2C_PROC_HOST | I2C_PROC_FSI, - I2C_RESET_MEMBUF_HOST = I2C_RANGE_MEMBUF | I2C_RANGE_HOST, - I2C_RESET_MEMBUF_FSI = I2C_RANGE_MEMBUF | I2C_RANGE_FSI, - I2C_RESET_MEMBUF_ALL = I2C_RESET_MEMBUF_HOST | I2C_RESET_MEMBUF_FSI, + I2C_MEMBUF_HOST = I2C_RANGE_MEMBUF | I2C_RANGE_HOST, + I2C_MEMBUF_FSI = I2C_RANGE_MEMBUF | I2C_RANGE_FSI, + I2C_MEMBUF_ALL = I2C_MEMBUF_HOST | I2C_MEMBUF_FSI, - I2C_RESET_ALL = I2C_RESET_PROC_ALL | I2C_RESET_MEMBUF_ALL, + I2C_ALL = I2C_PROC_ALL | I2C_MEMBUF_ALL, }; /** @@ -97,7 +79,7 @@ enum i2cResetType * * @param[in] i_resetType - Specfies which targets and which I2C master engines * to reset - * (see i2cResetType description above) + * (see i2cProcessType description above) * * @param[in] i_functional - Specfies if reset is performed on functional or * any existing targets that match the i_resetType @@ -107,7 +89,28 @@ enum i2cResetType * @return errlHndl_t - Null if successful, otherwise a pointer to * the error log. */ -errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, +errlHndl_t i2cResetActiveMasters ( i2cProcessType i_resetType, + bool i_functional = true ); + +/** + * @brief This function will handle everything required to setup a target's + * "active" I2C master engine. + * [NOTE: "active" engine is determined by target's I2C_SWITCHES attribute] + * + * + * @param[in] i_setupType - Specfies which targets and which I2C master engines + * to setup + * (see i2cProcessType description above) + * + * @param[in] i_functional - Specfies if setup is performed on functional or + * any existing targets that match the i_resetType + * if true - functional targets + * if false - existing targets + * + * @return errlHndl_t - Null if successful, otherwise a pointer to + * the error log. + */ +errlHndl_t i2cSetupActiveMasters ( i2cProcessType i_setupType, bool i_functional = true ); diff --git a/src/include/usr/i2c/i2creasoncodes.H b/src/include/usr/i2c/i2creasoncodes.H index 210fd2c0a..c6685e181 100644 --- a/src/include/usr/i2c/i2creasoncodes.H +++ b/src/include/usr/i2c/i2creasoncodes.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2014 */ +/* Contributors Listed Below - COPYRIGHT 2011,2015 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -57,7 +57,7 @@ enum i2cModuleId I2C_CHECK_FOR_ERRORS = 0x07, I2C_SETUP_MASTERS = 0x08, I2C_SEND_SLAVE_STOP = 0x09, - I2C_RESET_MASTERS = 0x0A, + I2C_PROCESS_ACTIVE_MASTERS = 0x0A, }; diff --git a/src/usr/hwas/hostbootIstep.C b/src/usr/hwas/hostbootIstep.C index 8390d1a61..42e756a07 100644 --- a/src/usr/hwas/hostbootIstep.C +++ b/src/usr/hwas/hostbootIstep.C @@ -98,7 +98,7 @@ void* host_init_fsi( void *io_pArgs ) break; } - l_errl = I2C::i2cResetActiveMasters(I2C::I2C_RESET_ALL, false); + l_errl = I2C::i2cResetActiveMasters(I2C::I2C_ALL, false); if (l_errl) { // Commit this error diff --git a/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C b/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C index d8fd737e2..4cb1d3a91 100644 --- a/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C +++ b/src/usr/hwpf/hwp/activate_powerbus/activate_powerbus.C @@ -349,12 +349,11 @@ void * call_host_slave_sbe_update( void * io_pArgs ) // Reset I2C devices before trying to access the SBE SEEPROMs // Any error returned should not fail istep - l_errl = I2C::i2cResetActiveMasters( I2C::I2C_RESET_PROC_HOST ); + l_errl = I2C::i2cResetActiveMasters( I2C::I2C_PROC_HOST ); if (l_errl) { - // Commit error + // Commit error and keep going errlCommit( l_errl, HWPF_COMP_ID ); - break; } // Call to check state of Processor SBE SEEPROMs and diff --git a/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C b/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C index 5c8450a49..63717dce6 100644 --- a/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C +++ b/src/usr/hwpf/hwp/slave_sbe/slave_sbe.C @@ -447,7 +447,7 @@ void* call_proc_check_slave_sbe_seeprom_complete( void *io_pArgs ) I2C::i2cSetAccessMode( I2C::I2C_SET_ACCESS_MODE_PROC_HOST ); // Reset the Processor's I2C Masters - l_errl = I2C::i2cResetActiveMasters(I2C::I2C_RESET_PROC_ALL); + l_errl = I2C::i2cResetActiveMasters(I2C::I2C_PROC_ALL); if (l_errl) { // Commit error diff --git a/src/usr/hwpf/hwp/start_payload/start_payload.C b/src/usr/hwpf/hwp/start_payload/start_payload.C index 4cc039759..7d28ae0b0 100644 --- a/src/usr/hwpf/hwp/start_payload/start_payload.C +++ b/src/usr/hwpf/hwp/start_payload/start_payload.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2014 */ +/* Contributors Listed Below - COPYRIGHT 2012,2015 */ /* [+] Google Inc. */ /* [+] International Business Machines Corp. */ /* */ @@ -705,12 +705,13 @@ errlHndl_t callShutdown ( uint64_t i_masterInstance, // divisor TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Setup I2C Masters" ); - err = I2C::i2cSetupMasters(); + err = I2C::i2cSetupActiveMasters(I2C::I2C_PROC_ALL); if( err ) { TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Error setting up I2C Bus Divisors" ); - break; + // just commit the error and keep going + errlCommit(err, ISTEP_COMP_ID); } // Get Target Service, and the system target. diff --git a/src/usr/i2c/i2c.C b/src/usr/i2c/i2c.C index 35de15ca3..5b405fa70 100755 --- a/src/usr/i2c/i2c.C +++ b/src/usr/i2c/i2c.C @@ -2225,132 +2225,6 @@ errlHndl_t i2cGetInterrupts ( TARGETING::Target * i_target, return err; } // end i2cGetInterrupts - -// ------------------------------------------------------------------ -// i2cSetupMasters -// ------------------------------------------------------------------ -errlHndl_t i2cSetupMasters ( void ) -{ - errlHndl_t err = NULL; - - misc_args_t args; - - mode_reg_t mode; - - TRACDCOMP( g_trac_i2c, - ENTER_MRK"i2cSetupMasters()" ); - - do - { - // Get top level system target - TARGETING::TargetService& tS = TARGETING::targetService(); - TARGETING::Target * sysTarget = NULL; - tS.getTopLevelTarget( sysTarget ); - assert( sysTarget != NULL ); - - // Get list of Procs - TARGETING::TargetHandleList procList; - TARGETING::PredicateCTM predProc( TARGETING::CLASS_CHIP, - TARGETING::TYPE_PROC ); - tS.getAssociated( procList, - sysTarget, - TARGETING::TargetService::CHILD, - TARGETING::TargetService::ALL, - &predProc ); - - if( 0 == procList.size() ) - { - TRACFCOMP( g_trac_i2c, - INFO_MRK"i2cSetupMasters: No Processor chips found!" ); - } - - TRACUCOMP( g_trac_i2c, - INFO_MRK"I2C Master Procs: %d", - procList.size() ); - - // Do reads to each Proc - for( uint32_t proc = 0; proc < procList.size(); proc++ ) - { - if( !procList[proc]->getAttr<TARGETING::ATTR_HWAS_STATE>().functional ) - { - // Non functional - TRACDCOMP( g_trac_i2c, - INFO_MRK"proc %d, is non-functional", - proc ); - continue; - } - - // Setup Host-based I2C - args.switches.useHostI2C = 1; - args.switches.useFsiI2C = 0; - - - for( uint32_t engine = 0; engine < P8_MASTER_ENGINES; engine++ ) - { - args.engine = engine; - - // Write Mode Register: - mode.value = 0x0ull; - - // Hardcode to 400KHz for PHYP - err = i2cSetBusVariables ( procList[proc], - I2C_BUS_SPEED_400KHZ, - args ); - - if( err ) - { - TRACFCOMP( g_trac_i2c, - ERR_MRK"i2cSetupMasters: Error Setting Bus " - "Speed Variables-Processor, engine: %d", - engine ); - - // If we get error skip setting this target, but still need - // to continue to program the I2C Bus Divisor for the rest - errlCommit( err, - I2C_COMP_ID ); - - continue; - } - - mode.bit_rate_div = args.bit_rate_divisor; - - err = i2cRegisterOp( DeviceFW::WRITE, - procList[proc], - &mode.value, - I2C_REG_MODE, - args ); - if( err ) - { - TRACFCOMP( g_trac_i2c, - ERR_MRK"i2cSetupMasters: Error reading from " - "Processor, engine: %d", - engine ); - - // If we get errors on these reads, we still need to continue - // to program the I2C Bus Divisor for the rest - errlCommit( err, - I2C_COMP_ID ); - } - } - - if( err ) - { - break; - } - } - - if( err ) - { - break; - } - } while( 0 ); - - TRACDCOMP( g_trac_i2c, - EXIT_MRK"i2cSetupMasters()" ); - - return err; -} - #define I2C_CALCULATE_BRD( i_clockSpeed ) ( i_clockSpeed / 37 ) // #define BRD_1024 = ( ( nest_freq / ( 16 * 1024 * KILOBYTE ) ) - 1 ) / 4; @@ -2444,11 +2318,19 @@ errlHndl_t i2cSetBusVariables ( TARGETING::Target * i_target, } /** - * @brief This function will handle everything required to reset each I2C master - * engine based on the input argement + * @brief This function will handle everything required to process + * each I2C master engine based on the input argements. + * List of operations in the i2cProcessOperation internal enum. */ -errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, - bool i_functional ) +enum i2cProcessOperation +{ + I2C_OP_RESET = 1, + I2C_OP_SETUP = 2, +}; +errlHndl_t i2cProcessActiveMasters ( i2cProcessType i_processType, + i2cProcessOperation i_processOperation, + uint64_t i_busSpeed, + bool i_functional ) { errlHndl_t err = NULL; bool error_found = false; @@ -2462,17 +2344,16 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, TARGETING::ATTR_I2C_BUS_SPEED_ARRAY_type speed_array; TRACFCOMP( g_trac_i2c, - ENTER_MRK"i2cResetActiveMasters(): i2cResetType=0x%X, " - "i_functional=%d", - i_resetType, i_functional ); - + ENTER_MRK"i2cProcessActiveMasters(): Type=0x%X, " + "Operation=%d Bus Speed=%d Functional=%d", + i_processType, i_processOperation, i_busSpeed, i_functional ); do { // Get list of Procs TARGETING::TargetHandleList procList; - if ( i_resetType & I2C_RANGE_PROC ) + if ( i_processType & I2C_RANGE_PROC ) { // Pass input parameter for function (true) or existing (false) @@ -2483,20 +2364,19 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, if( 0 == procList.size() ) { TRACFCOMP(g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: No Processor chips found!"); + "i2cProcessActiveMasters: No Processor chips found!"); } TRACFCOMP( g_trac_i2c, - INFO_MRK"i2cResetActiveMasters: I2C Master Procs: %d", - procList.size() ); + INFO_MRK"i2cProcessActiveMasters: I2C Master Procs: %d", + procList.size() ); } - // Get list of Membufs TARGETING::TargetHandleList membufList; - if ( i_resetType & I2C_RANGE_MEMBUF ) + if ( i_processType & I2C_RANGE_MEMBUF ) { // Pass input parameter for function (true) or existing (false) @@ -2507,12 +2387,12 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, if( 0 == membufList.size() ) { TRACFCOMP(g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: No Membuf chips found!"); + "i2cProcessActiveMasters: No Membuf chips found!"); } TRACFCOMP( g_trac_i2c, - INFO_MRK"i2cResetActiveMasters: I2C Master Membufs: %d", - membufList.size() ); + INFO_MRK"i2cProcessActiveMasters: I2C Master Membufs: %d", + membufList.size() ); } // Combine lists into chipList @@ -2528,41 +2408,40 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, assert((err == NULL), "tS.queryMasterProcChipTargetHandle returned " "err for masterProcChipTargetHandle"); - // Do resets for each chip/target + // Process each chip/target for( size_t chip = 0; chip < chipList.size(); chip++ ) { TARGETING::Target* tgt = chipList[chip]; TRACUCOMP( g_trac_i2c, - INFO_MRK"i2cResetActiveMasters: Loop for tgt=0x%X", + INFO_MRK"i2cProcessActiveMasters: Loop for tgt=0x%X", TARGETING::get_huid(tgt) ); // Look up I2C Mode for the target io_args.switches.useHostI2C = 0; io_args.switches.useFsiI2C = 0; - i2cSetSwitches( tgt, io_args ); // Compare mode with input parameter - if ( !( i_resetType & I2C_RANGE_HOST ) + if ( !( i_processType & I2C_RANGE_HOST ) && ( io_args.switches.useHostI2C == 1 ) ) { TRACUCOMP( g_trac_i2c, - INFO_MRK"i2cResetActiveMasters: skipping tgt=0x%X " - "due to i_resetType=%d, useHostI2C=%d", - TARGETING::get_huid(tgt), i_resetType, - io_args.switches.useHostI2C ); + INFO_MRK"i2cProcessActiveMasters: skipping tgt=0x%X " + "due to i_processType=%d, useHostI2C=%d", + TARGETING::get_huid(tgt), i_processType, + io_args.switches.useHostI2C ); continue; } - if ( !( i_resetType & I2C_RANGE_FSI ) + if ( !( i_processType & I2C_RANGE_FSI ) && ( io_args.switches.useFsiI2C == 1 ) ) { TRACUCOMP( g_trac_i2c, - INFO_MRK"i2cResetActiveMasters: skipping tgt=0x%X " - "due to i_resetType=%d, useFsiI2C=%d", - TARGETING::get_huid(tgt), i_resetType, - io_args.switches.useFsiI2C ); + INFO_MRK"i2cProcessActiveMasters: skipping tgt=0x%X " + "due to i_processType=%d, useFsiI2C=%d", + TARGETING::get_huid(tgt), i_processType, + io_args.switches.useFsiI2C ); continue; } @@ -2580,18 +2459,21 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, * @errortype * @reasoncode I2C_ATTRIBUTE_NOT_FOUND * @severity ERRORLOG_SEV_UNRECOVERABLE - * @moduleid I2C_RESET_MASTERS + * @moduleid I2C_PROCESS_ACTIVE_MASTERS * @userdata1 Target for the attribute - * @userdata2 <UNUSED> + * @userdata2[0:31] Operation + * @userdata2[32:64] Type * @devdesc ATTR_I2C_BUS_SPEED_ARRAY not found * @custdesc I2C configuration data missing */ err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, - I2C_RESET_MASTERS, + I2C_PROCESS_ACTIVE_MASTERS, I2C_ATTRIBUTE_NOT_FOUND, TARGETING::get_huid(tgt), - 0x0, + TWO_UINT32_TO_UINT64( + i_processOperation, + i_processType), true /*Add HB SW Callout*/ ); err->collectTrace( I2C_COMP_NAME, 256); @@ -2601,7 +2483,6 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, continue; } - // if i_functional == false then all possible returned in chipList, // so need to check if each target is present // -- master target defaulted to present @@ -2613,7 +2494,7 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, if ( check == false ) { TRACUCOMP( g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: skipping tgt=0x%X " + "i2cProcessActiveMasters: skipping tgt=0x%X " "due to FSI::isSlavePresent returned=%d", TARGETING::get_huid(tgt), check ); continue; @@ -2621,9 +2502,9 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, else { TRACUCOMP( g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: keeping tgt=0x%X due " - "to FSI::isSlavePresent returned=%d", - TARGETING::get_huid(tgt), check ); + "i2cProcessActiveMasters: keeping tgt=0x%X due " + "to FSI::isSlavePresent returned=%d", + TARGETING::get_huid(tgt), check ); } } @@ -2634,7 +2515,8 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, io_args.engine = engine; // Only reset engine 0 for FSI - if ( ( engine != 0 ) && + if ( (i_processType & I2C_OP_RESET ) && + ( engine != 0 ) && (io_args.switches.useFsiI2C == 1) ) { continue; @@ -2655,17 +2537,17 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, if ( skip == true ) { TRACUCOMP( g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: no devices found on " - "tgt=0x%X engine=%d", - TARGETING::get_huid(tgt), engine ); + "i2cProcessActiveMasters: no devices found on " + "tgt=0x%X engine=%d", + TARGETING::get_huid(tgt), engine ); continue; } else { TRACFCOMP( g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: Resetting tgt=0x%X " - "engine=%d", - TARGETING::get_huid(tgt), engine ); + "i2cProcessActiveMasters: Reset/Setup tgt=0x%X " + "engine=%d", + TARGETING::get_huid(tgt), engine ); } error_found = false; @@ -2680,7 +2562,7 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, if( !mutex_success ) { TRACUCOMP( g_trac_i2c, - ERR_MRK"Error in i2cResetActiveMasters: " + ERR_MRK"Error in i2cProcessActiveMasters: " "i2cGetEngineMutex() failed to get mutex. " "skipping reset on tgt=0x%X engine =%d", TARGETING::get_huid(tgt), engine ); @@ -2689,28 +2571,28 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, // Lock on this engine TRACUCOMP( g_trac_i2c, - INFO_MRK"i2cResetActiveMasters: Obtaining lock for " - "engine: %d", engine ); + INFO_MRK"i2cProcessActiveMasters: Obtaining lock for " + "engine: %d", engine ); (void)mutex_lock( engineLock ); mutex_needs_unlock = true; TRACUCOMP( g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: Locked on engine: %d", + "i2cProcessActiveMasters: Locked on engine: %d", engine ); TRACUCOMP( g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: Reset 0x%X engine = %d", + "i2cProcessActiveMasters: Reset 0x%X engine = %d", TARGETING::get_huid(tgt), engine ); + // Setup Bus Speed err = i2cSetBusVariables ( tgt, - I2C_BUS_SPEED_FROM_MRW, + i_busSpeed, io_args ); - if( err ) { error_found = true; TRACFCOMP( g_trac_i2c,ERR_MRK - "i2cResetActiveMasters: Error Setting Bus " + "i2cProcessActiveMasters: Error Setting Bus " "Variables: tgt=0x%X engine=%d", TARGETING::get_huid(tgt), engine ); @@ -2722,26 +2604,70 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, // Don't continue or break - need mutex unlock } - - // Now reset the engine/bus + // Now reset or setup the engine/bus if ( error_found == false ) { - err = i2cReset ( tgt, io_args, - FORCE_UNLOCK_RESET); - if( err ) + switch (i_processOperation) { - TRACFCOMP( g_trac_i2c,ERR_MRK - "i2cResetActiveMasters: Error reseting " + case I2C_OP_RESET: + { + TRACFCOMP( g_trac_i2c,INFO_MRK + "i2cProcessActiveMasters: reset engine: %d", + engine ); + + err = i2cReset ( tgt, io_args, + FORCE_UNLOCK_RESET); + if( err ) + { + TRACFCOMP( g_trac_i2c,ERR_MRK + "i2cProcessActiveMasters: Error reseting " "tgt=0x%X, engine=%d", TARGETING::get_huid(tgt), engine); - // If we get errors on the reset, we still need to - // to reset the other I2C engines - errlCommit( err, + // If we get errors on the reset, we still need + // to reset the other I2C engines + errlCommit( err, I2C_COMP_ID ); - // Don't continue or break - need mutex unlock - } + // Don't continue or break - need mutex unlock + } + break; + } + case I2C_OP_SETUP: + { + mode_reg_t mode; + + TRACFCOMP( g_trac_i2c,INFO_MRK + "i2cProcessActiveMasters: setup engine: %d", + engine ); + + mode.bit_rate_div = io_args.bit_rate_divisor; + + err = i2cRegisterOp( DeviceFW::WRITE, + tgt, + &mode.value, + I2C_REG_MODE, + io_args ); + if( err ) + { + TRACFCOMP( g_trac_i2c, + ERR_MRK"i2cProcessActiveMasters:" + " Error reading from" + " Processor, engine: %d", + engine ); + + // If we get errors on these reads, + // we still need to continue + // to program the I2C Bus Divisor for the rest + errlCommit( err, + I2C_COMP_ID ); + } + break; + } + default: + assert (0,"i2cProcessActiveMasters: " + "invalid operation"); + } } // Check if we need to unlock the mutex @@ -2750,8 +2676,8 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, // Unlock (void) mutex_unlock( engineLock ); TRACUCOMP( g_trac_i2c,INFO_MRK - "i2cResetActiveMasters: Unlocked engine: %d", - engine ); + "i2cProcessActiveMasters: Unlocked engine: %d", + engine ); } } // end for-loop engine @@ -2761,12 +2687,66 @@ errlHndl_t i2cResetActiveMasters ( i2cResetType i_resetType, } while( 0 ); TRACFCOMP( g_trac_i2c, + EXIT_MRK"i2cProcessActiveMasters(): err rc=0x%X, plid=0x%X", + ERRL_GETRC_SAFE(err), ERRL_GETPLID_SAFE(err)); + + return err; +} + +/** + * @brief This function is a wrapper to the common routine to reset + * I2C engines selected based on the input argements. + * Set bus speed from the MRW value. + */ +errlHndl_t i2cResetActiveMasters ( i2cProcessType i_resetType, + bool i_functional ) +{ + errlHndl_t err = NULL; + + TRACFCOMP( g_trac_i2c, + ENTER_MRK"i2cResetActiveMasters(): i2cProcessType=0x%X, " + "i_functional=%d", + i_resetType, i_functional ); + + err = i2cProcessActiveMasters (i_resetType, // select engines + I2C_OP_RESET, // reset engines + I2C_BUS_SPEED_FROM_MRW, + i_functional); + + TRACFCOMP( g_trac_i2c, EXIT_MRK"i2cResetActiveMasters(): err rc=0x%X, plid=0x%X", ERRL_GETRC_SAFE(err), ERRL_GETPLID_SAFE(err)); return err; } +/** + * @brief This function is a wrapper to the common routine to setup + * I2C engines selected based on the input argements. + * Set bus speed 400KHZ for Phyp (and other payloads). + */ +errlHndl_t i2cSetupActiveMasters ( i2cProcessType i_setupType, + bool i_functional ) +{ + errlHndl_t err = NULL; + + TRACFCOMP( g_trac_i2c, + ENTER_MRK"i2cSetupActiveMasters(): i2cProcessType=0x%X, " + "i_functional=%d", + i_setupType, i_functional ); + + err = i2cProcessActiveMasters (i_setupType, // select engines + I2C_OP_SETUP, // setup engines + I2C_BUS_SPEED_400KHZ, + i_functional); + + TRACFCOMP( g_trac_i2c, + EXIT_MRK"i2cSetupActiveMasters(): err rc=0x%X, plid=0x%X", + ERRL_GETRC_SAFE(err), ERRL_GETPLID_SAFE(err)); + + return err; +} + // ------------------------------------------------------------------ // i2cSetAccessMode // NOTE: currently just supporting I2C_SET_MODE_PROC_HOST diff --git a/src/usr/i2c/test/i2ctest.H b/src/usr/i2c/test/i2ctest.H index 77470033e..d4bd8a9f2 100755 --- a/src/usr/i2c/test/i2ctest.H +++ b/src/usr/i2c/test/i2ctest.H @@ -631,32 +631,31 @@ class I2CTest: public CxxTest::TestSuite * needed by PHYP to ensure that the I2C masters are * setup correctly on the system. */ - void testI2CSetupMasters ( void ) + void testI2CSetupActiveMasters ( void ) { errlHndl_t err = NULL; int fails = 0; const int NUM_CMDS = 1; TRACFCOMP( g_trac_i2c, - "testI2CSetupMasters - Start" ); + "testI2CSetupActiveMasters - Start" ); - err = I2C::i2cSetupMasters(); + err = I2C::i2cSetupActiveMasters(I2C::I2C_PROC_ALL); if( err ) { - TS_FAIL( "testI2CSetupMasters - Error returned from " - "i2cSetupMasters()"); + TS_FAIL( "testI2CSetupActiveMasters - Error returned from " + "i2cSetupActiveMasters(I2C_PROC_ALL)"); fails++; delete err; } TRACFCOMP( g_trac_i2c, - "testI2CSetupMasters - End: %d/%d fails", + "testI2CSetupActiveMasters - End: %d/%d fails", fails, NUM_CMDS ); } - /** * @brief Call I2C Set Bus Variables and related functions * |