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| author | Nick Bofferding <bofferdn@us.ibm.com> | 2017-11-20 10:34:07 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-11-28 10:21:37 -0500 |
| commit | 2fc740c30b902bd7faae659031ece11592779a54 (patch) | |
| tree | a4f2b482d9b0677a1984f9e93040027f20961f66 | |
| parent | 75f0cfee9e5d1eb6c2f76d1898976391c1ab5031 (diff) | |
| download | talos-hostboot-2fc740c30b902bd7faae659031ece11592779a54.tar.gz talos-hostboot-2fc740c30b902bd7faae659031ece11592779a54.zip | |
Secure Boot: Enable PSI interrupts after XSCOM switchover
Change-Id: I07f01b3c174373681f11686d825f74060b36f780
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49912
Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
| -rw-r--r-- | src/usr/isteps/istep10/call_proc_build_smp.C | 28 |
1 files changed, 13 insertions, 15 deletions
diff --git a/src/usr/isteps/istep10/call_proc_build_smp.C b/src/usr/isteps/istep10/call_proc_build_smp.C index 4f3a83e56..07bbbed06 100644 --- a/src/usr/isteps/istep10/call_proc_build_smp.C +++ b/src/usr/isteps/istep10/call_proc_build_smp.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -190,20 +190,6 @@ void* call_proc_build_smp (void *io_pArgs) { TARGETING::Target* l_proc_target = *curproc; - - if (l_proc_target != l_masterProc) - { - //Enable PSIHB Interrupts for slave proc -- moved from above - l_errl = INTR::enablePsiIntr(l_proc_target); - if(l_errl) - { - // capture the target data in the elog - ErrlUserDetailsTarget(l_proc_target).addToLog( l_errl ); - break; - } - } - - // If the proc chip supports xscom.. if (l_proc_target->getAttr<ATTR_PRIMARY_CAPABILITIES>() .supportsXscom) @@ -237,6 +223,18 @@ void* call_proc_build_smp (void *io_pArgs) } } + if (l_proc_target != l_masterProc) + { + //Enable PSIHB Interrupts for slave proc -- moved from above + l_errl = INTR::enablePsiIntr(l_proc_target); + if(l_errl) + { + // capture the target data in the elog + ErrlUserDetailsTarget(l_proc_target).addToLog( l_errl ); + break; + } + } + ++curproc; } |
