From 2fc740c30b902bd7faae659031ece11592779a54 Mon Sep 17 00:00:00 2001 From: Nick Bofferding Date: Mon, 20 Nov 2017 10:34:07 -0600 Subject: Secure Boot: Enable PSI interrupts after XSCOM switchover Change-Id: I07f01b3c174373681f11686d825f74060b36f780 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49912 Reviewed-by: Stephen M. Cprek Tested-by: Jenkins Server Tested-by: Jenkins OP Build CI Tested-by: Jenkins OP HW Tested-by: FSP CI Jenkins Reviewed-by: Michael Baiocchi Reviewed-by: Daniel M. Crowell --- src/usr/isteps/istep10/call_proc_build_smp.C | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) diff --git a/src/usr/isteps/istep10/call_proc_build_smp.C b/src/usr/isteps/istep10/call_proc_build_smp.C index 4f3a83e56..07bbbed06 100644 --- a/src/usr/isteps/istep10/call_proc_build_smp.C +++ b/src/usr/isteps/istep10/call_proc_build_smp.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -190,20 +190,6 @@ void* call_proc_build_smp (void *io_pArgs) { TARGETING::Target* l_proc_target = *curproc; - - if (l_proc_target != l_masterProc) - { - //Enable PSIHB Interrupts for slave proc -- moved from above - l_errl = INTR::enablePsiIntr(l_proc_target); - if(l_errl) - { - // capture the target data in the elog - ErrlUserDetailsTarget(l_proc_target).addToLog( l_errl ); - break; - } - } - - // If the proc chip supports xscom.. if (l_proc_target->getAttr() .supportsXscom) @@ -237,6 +223,18 @@ void* call_proc_build_smp (void *io_pArgs) } } + if (l_proc_target != l_masterProc) + { + //Enable PSIHB Interrupts for slave proc -- moved from above + l_errl = INTR::enablePsiIntr(l_proc_target); + if(l_errl) + { + // capture the target data in the elog + ErrlUserDetailsTarget(l_proc_target).addToLog( l_errl ); + break; + } + } + ++curproc; } -- cgit v1.2.1