VBU IPL -- update sim PLL configuration

  Adjust refclock/PLL configuration to drive all mesh clocks from PLLs
    non-IO/wafer configuration (nest PLL bucket #1) -- default for sc/sq/fc
    IO/system model configuration (nest PLL bucket #2) -- default for mc

  Regression framework updates
    Remove dependence on sim-only varosc/refclock HWPs
    Scan from HW image (ultimately need to move to SEEPROM)
    Add memory attribute HWPs missing from flow
    Handle real/broadside scan options

  HWP updates
    Scan PLL configuration from image
    Preserve clock mux attribute programming
    First crack at removing unneeded PLL buckets from images/TOR
    Add boot support for warm IPL

Change-Id: Ic7f27ab3dfdf258471d91618adc8eae4cadb2e42
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26938
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26939
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

0 files changed, 0 insertions, 0 deletions