1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
|
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: import/chips/p9/procedures/ppe_closed/pgpe/boot/pgpe_boot_copier.S $ */
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
.nolist
#include <ppe42_asm.h>
#include <p9_hcd_memmap_homer.H>
#include <p9_hcd_memmap_occ_sram.H>
#include <pgpe_boot_defines.H>
.list
.section .loader_text, "ax", @progbits
__vectors:
.org __vectors + 0x0000
__machine_check:
trap
.org __vectors + 0x0040
.global __system_reset
__system_reset:
b __bootCopier
.org __vectors + 0x0060
__data_storage:
trap
.org __vectors + 0x0080
__instruction_storage:
trap
.org __vectors + 0x00A0
__external_interrupt_vector:
trap
.org __vectors + 0x00C0
__alignment_exception:
trap
.org __vectors + 0x00E0
__program_exception:
trap
.org __vectors + 0x0100
__dec_interrupt:
trap
.org __vectors + 0x0120
__fit_interrupt:
trap
.org __vectors + 0x0140
__watchdog_interrupt:
trap
__bootCopier:
## Address where the Boot loader will be loaded in SRAM (Destination address)
_liw %GPR_BL_SRAM_ADDR, OCC_SRAM_PGPE_BOOT_LOADER_ADDR
## Base address of PPMR header, also the PGPE base address
_liw %GPR_PPMR_ADDR, HOMER_PPMR_HEADER_ADDR
## Location in PPMR header where the offset of Boot loader is present
_liw %GPR_BL_HOMER, HOMER_PGPE_BOOT_LOADER_OFFSET_ADDR
## Fetch offset of Boot loader
lwz GPR_BL_HOMER_ADDR, OFFSET(GPR_BL_HOMER)
## Compute the source address of Boot loader (address in HOMER)
add GPR_BL_HOMER_ADDR, GPR_BL_HOMER_ADDR, GPR_PPMR_ADDR
## Location in PPMR header where the length of boot loader is present
_liw %GPR_BL_HOMER, HOMER_PGPE_BOOT_LOADER_LENGTH_ADDR
## Boot Loader size(in Bytes)
lwz GPR_BL_SIZE, OFFSET(GPR_BL_HOMER)
srwi GPR_BL_SIZE, GPR_BL_SIZE, PGPE_DIV_8
## If bootLoader size is 0 then failure
cmpwbeq %GPR_BL_SIZE, 00, BCFAIL
## Set the counter for copy loop
mtctr GPR_BL_SIZE
## Copy the bootLoader from HOMER to OCC SRAM
copy_loop:
lvd DATA_WR, OFFSET(GPR_BL_HOMER_ADDR) # Load Double word
stvd DATA_WR, OFFSET(GPR_BL_SRAM_ADDR) # Destination address
addi GPR_BL_HOMER_ADDR, GPR_BL_HOMER_ADDR, NXT_BLK_OFF # Increasing source address
addi GPR_BL_SRAM_ADDR, GPR_BL_SRAM_ADDR, NXT_BLK_OFF # Increasing Dest address
bdnz copy_loop # Keep repeating the address.
## Write the success status "BC-S" to PPMR header
_liw %GPR_STAT_ADDR, PGPE_BOOT_COPY_SUCCESS
stw GPR_STAT_ADDR, OFF_STAT_WR(GPR_PPMR_ADDR)
BRANCH:
## branch to the system_reset location for bootLoader to be executed
_liw %GPR_TEMP, OCC_SRAM_PGPE_BOOT_LOADER_RESET_ADDR
mtlr GPR_TEMP
blr
## Write the failure status "BC-F" to PPMR header
BCFAIL:
_liw %GPR_STAT_ADDR, PGPE_BOOT_COPIER_FAIL
stw GPR_STAT_ADDR, OFF_STAT_WR(GPR_PPMR_ADDR)
trap
.epilogue __bootCopier
|
