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* Risk level 3/4/5 support: Step 1 - backward compatibility and v6 imageClaus Michael Olsen2018-04-262-7/+7
* Code restruct: ring_applyClaus Michael Olsen2018-04-062-2/+2
* Additional risk level support - (step 1) Backward compatibilityClaus Michael Olsen2018-03-222-4/+4
* apply rings from Centaur HW imageJoe McGill2018-02-011-102/+108
* apply rings from Centaur HW imageJoe McGill2018-02-012-8/+34
* Code restruct: TOR APIClaus Michael Olsen2018-02-012-7/+5
* Centaur ring support - TOR APIClaus Michael Olsen2017-11-272-2/+76
* Centaur ring support - ring_apply and ring dataSumit Kumar2017-11-272-0/+170
* Centaur ring support - TOR APIClaus Michael Olsen2017-11-171-11/+29
* Centaur ring support - ring_apply and ring dataSumit Kumar2017-11-172-222/+455
* Power Cleanup + stopclocksLuke Mulkey2017-10-231-0/+17
* Add initial p9c ddr_phy_reset, dimmBadDqBitmapAccessHwp, slew, & unmask_errorsAndre Marin2017-10-231-0/+73
* centaur_misc_constants.H -- adjust polling costants for simJoe McGill2017-10-231-2/+2
* Centaur istep 11 supportThi Tran2017-10-233-0/+301
* Edit ECID+Perv code to use new gen'd centaur scom headersLuke Mulkey2017-10-233-72/+34
* Adding generated Centaur scom and field constants.Ben Gass2017-10-237-0/+93135
* mss_get_ecid code for 11/15 SOA chkptLuke Mulkey2017-10-231-0/+71
* Centaur SBE -> FAPI2:xiaozq2017-10-231-0/+100
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