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path: root/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C
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Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C')
-rwxr-xr-ximport/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C29
1 files changed, 29 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C
index b0c53e62..46324f52 100755
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_initf.C
@@ -25,12 +25,41 @@
#include "p9_sgpe_stop.h"
#include "p9_sgpe_stop_exit_marks.h"
+#include "hw_access.H"
+#include "p9_ringid_sgpe.H"
+#include <fapi2.H>
extern "C" int p9_hcd_cache_initf(uint32_t quad)
{
int rc = SGPE_STOP_SUCCESS;
+ fapi2::Target<fapi2::TARGET_TYPE_EQ> l_eqTarget
+ (
+ fapi2::plat_getTargetHandleByChipletNumber((uint8_t)quad + EQ_CHIPLET_OFFSET)
+ );
+
+ FAPI_DBG("Scanning Cache FUNC Rings");
+ FAPI_INF(">>p9_hcd_cache_initf");
+
+ FAPI_DBG("Scan eq_fure ring");
+ FAPI_TRY(fapi2::putRing(l_eqTarget, eq_fure));
+ FAPI_DBG("Scan eq_ana_func ring");
+ FAPI_TRY(fapi2::putRing(l_eqTarget, eq_ana_func));
+
+ for (auto l_ex_target : l_eqTarget.getChildren<fapi2::TARGET_TYPE_EX>())
+ {
+ FAPI_DBG("Scan ex_l2_fure ring");
+ FAPI_TRY(fapi2::putRing(l_ex_target, ex_l2_fure));
+ FAPI_DBG("Scan ex_l2_mode ring");
+ FAPI_TRY(fapi2::putRing(l_ex_target, ex_l2_mode));
+ FAPI_DBG("Scan ex_l3_fure ring");
+ FAPI_TRY(fapi2::putRing(l_ex_target, ex_l3_fure));
+ FAPI_DBG("Scan ex_l3_refr_fure ring");
+ FAPI_TRY(fapi2::putRing(l_ex_target, ex_l3_refr_fure));
+ }
// Markers needed for cache ininf
+fapi_try_exit:
+ FAPI_INF("<<p9_hcd_cache_initf");
return rc;
}
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