diff options
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c index d5e530f4..1a4cdf61 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_cache_chiplet_reset.c @@ -82,7 +82,7 @@ p9_hcd_cache_chiplet_reset(uint32_t quad, uint32_t ex) GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_PPM_CGCR, quad), (BIT64(0) | BIT64(3))); PK_TRACE("Flip L2 glsmux to DPLL via QPPM_EXCGCR[34:35]"); -#if !HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX +#if HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_OR, quad), BITS64(34, 2)); #else GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_OR, quad), ((uint64_t)ex << SHIFT64(35))); @@ -98,7 +98,7 @@ p9_hcd_cache_chiplet_reset(uint32_t quad, uint32_t ex) GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_PPM_CGCR, quad), BIT64(3)); PK_TRACE("Drop L2 glsmux reset via QPPM_EXCGCR[32:33]"); -#if !HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX +#if HW388878_DD1_VCS_POWER_ON_IN_CHIPLET_RESET_FIX GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_CLR, quad), BITS64(32, 2)); #else GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_EXCGCR_CLR, quad), ((uint64_t)ex << SHIFT64(33))); |
