diff options
24 files changed, 1666 insertions, 21 deletions
diff --git a/import/chips/p9/common/pmlib/common/libcommonfiles.mk b/import/chips/p9/common/pmlib/common/libcommonfiles.mk index deb8ed7c..b8028ccf 100644 --- a/import/chips/p9/common/pmlib/common/libcommonfiles.mk +++ b/import/chips/p9/common/pmlib/common/libcommonfiles.mk @@ -46,7 +46,7 @@ C-SOURCES = \ memset.c \ rand32.c \ string.c \ - sync.c + sync.c S-SOURCES = diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H index 07ce02fa..9a11ec68 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H +++ b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H @@ -37,7 +37,6 @@ //-------------------------------------------------------------------------- // local structs and constants // ------------------------------------------------------------------------- - #ifndef __ASSEMBLER__ #ifndef __PPE_PLAT diff --git a/import/chips/p9/procedures/hwp/lib/p9_stop_util.H b/import/chips/p9/procedures/hwp/lib/p9_stop_util.H index 101a9ea9..a43ff93d 100755 --- a/import/chips/p9/procedures/hwp/lib/p9_stop_util.H +++ b/import/chips/p9/procedures/hwp/lib/p9_stop_util.H @@ -31,7 +31,9 @@ #include <endian.h> #endif -#include "p9_stop_api.H" +#ifndef __PPE_PLAT + #include "p9_stop_api.H" +#endif #ifdef FAPI_2 #include <fapi2.H> diff --git a/import/chips/p9/procedures/ppe/tools/PowerPCtoPPE/ppc-ppe-pcp.py b/import/chips/p9/procedures/ppe/tools/PowerPCtoPPE/ppc-ppe-pcp.py index 35d8da20..88417a42 100755 --- a/import/chips/p9/procedures/ppe/tools/PowerPCtoPPE/ppc-ppe-pcp.py +++ b/import/chips/p9/procedures/ppe/tools/PowerPCtoPPE/ppc-ppe-pcp.py @@ -583,7 +583,7 @@ def p2p_combine(first_line, second_line, first_op, second_op): if 'f' in rule: if not P2P_COMPARE_BRANCH: - return True,False + return True,False # fusing compare and branch ppe_op = ppe_op + second_op @@ -739,7 +739,7 @@ def p2p_onefile(ppcFileName): # initialize storage variables for previous line that needs to be remembered pre_line = "" pre_op = "" - + done = True # use inline file editing, back up original PPC assembly file as <filename>.S for line in fileinput.input(ppeFileName, inplace=1, backup='.405'): @@ -949,7 +949,7 @@ def p2p_main(): global P2P_COMPARE_BRANCH; P2P_COMPARE_BRANCH = options.compare_branch # enable only combined virtual double function global P2P_VIRTUAL_DOUBLE; P2P_VIRTUAL_DOUBLE = options.virtual_double - + if P2P_VERBOSE : print "PPC405 Assembly to PPE42 Assembly Post-Compiler Proceesor (P2P)" print "Version: " + P2P_VERSION diff --git a/import/chips/p9/procedures/ppe_closed/cme/link.cmd b/import/chips/p9/procedures/ppe_closed/cme/link.cmd index 10436196..790f035f 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/link.cmd +++ b/import/chips/p9/procedures/ppe_closed/cme/link.cmd @@ -31,10 +31,7 @@ #endif OUTPUT_FORMAT(elf32-powerpc); - -#define SRAM_START 0xffff8000 -#define SRAM_LENGTH 0x8000 -#define PPE_DEBUG_PTRS_OFFSET 0x180 +#include "p9_cme_img_layout.h" MEMORY { diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.c new file mode 100644 index 00000000..bd159a66 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.c @@ -0,0 +1,97 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.c $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include "p9_cme_copy_scan_ring.h" +#include "p9_cme_stop.h" +#include "cmehw_common.h" +#include "gpehw_common.h" +#include "p9_cme_img_layout.h" +#include "p9_hcode_image_defines.H" + +/// @brief local constants. +enum +{ + SPR_NUM_PIR = 286, + CME_IMAGE_BASE_ADDR = SRAM_START, + CME_INST_ID_MASK = 0x0000001F, + COPY_DEF_CME_ADDR = 0x00000000, + CME_PAGE_RD_SIZE = 0x20, + CME_IMG_HDR_ADDR = CME_IMAGE_OFFSET, +}; + +void instance_scan_init( ) +{ + uint32_t l_cmePir = 0; + + uint32_t l_bcLength = 0; + uint32_t l_bceMbase = CME_INST_SPEC_RING_START; + asm volatile ( "mfspr %0, %1 \n\t" : "=r" (l_cmePir) : "i" (SPR_NUM_PIR)); + l_cmePir = l_cmePir & CME_INST_ID_MASK; // get CME instance number + CmeImageHeader_t* pCmeImgHdr = (CmeImageHeader_t*)(CME_IMG_HDR_ADDR); + + //calculate start address of block copy and length of block copy + l_bcLength = pCmeImgHdr->coreSpecificRingLength; // integral multiple of 32. + //let us find out HOMER address where core specific scan rings reside. + l_bceMbase = l_bceMbase + ( l_cmePir * l_bcLength ); + l_bceMbase = (l_bceMbase >> 5 ); + + // calculate the CME SRAM destination block number(SBASE) + // Offset below is wrt start of CME's SRAM. It is an integral + // multiple of 32 and is populated by Hcode Image build while + // building HOMER. + uint32_t cmeSbase = pCmeImgHdr->coreSpecificRingOffset; + PK_TRACE( "Start second block copy MBASE 0x%08x SBSE 0x%08x Len 0x%08x CME Ist %d", + l_bceMbase, cmeSbase, l_bcLength, l_cmePir ); + + startCmeBlockCopy( cmeSbase, l_bcLength, l_cmePir, PLAT_CME, BAR_INDEX_1, l_bceMbase ); + +} + + +BceReturnCode_t isScanRingCopyDone( ) +{ + BceReturnCode_t l_rc; + uint32_t l_cmePir = 0; + asm volatile ( "mfspr %0, %1 \n\t" : "=r" (l_cmePir) : "i" (SPR_NUM_PIR)); + l_cmePir = l_cmePir & CME_INST_ID_MASK; // get CME instance number + + while(1) + { + l_rc = checkCmeBlockCopyStatus( l_cmePir, PLAT_CME ); + + if( BLOCK_COPY_SUCCESS == l_rc ) + { + break; + } + + if( BLOCK_COPY_FAILED == l_rc ) + { + PK_TRACE( "failed to copy instance specific scan ring on cme %d", + l_cmePir ); + break; + } + } + + return l_rc; +} diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.h b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.h new file mode 100644 index 00000000..4faf7664 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.h @@ -0,0 +1,55 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_copy_scan_ring.h $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __P9_CME_COPY_SCAN_RING_H__ +#define __P9_CME_COPY_SCAN_RING_H__ + +#include "p9_hcd_block_copy.h" + +/// models CME Image header copied during first block copy. +typedef struct +{ + uint64_t iv_magicWord; + uint32_t iv_buildDate; + uint32_t iv_buildVersion; + uint32_t iv_cmeHcodeOfset; + uint32_t iv_cmeHcodeLen; + uint32_t iv_CommonRingOffset; + uint32_t iv_CommonRingLength; + uint32_t iv_cmeQuadPsate; + uint32_t iv_cmeQuadPstateLen; + uint32_t iv_coreSpecRingOffset; + uint32_t iv_coreSpecRingLength; + uint32_t iv_cmeImgMode; + uint32_t iv_reserve[3]; +} CmeImageHdr_t; + +/// @brief initiates the second block copy to copy instance specific scan rings. +void instance_scan_init(); + +/// @brief checks if block copy of scan ring is complete. +/// @retval BLOCK_COPY_SUCCESS if function succeeds else error code. +/// @note function call is blocking +BceReturnCode_t isScanRingCopyDone(); +#endif diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_cpmr.S b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_cpmr.S new file mode 100644 index 00000000..c215be29 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_cpmr.S @@ -0,0 +1,114 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_cpmr.S $ +# +# OpenPOWER HCODE Project +# +# COPYRIGHT 2015,2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + +.section ".cpmr" , "aw", @progbits + +.global g_cpmr_attn_quad +.global g_cpmr_magic_word +.global g_build_date +.global g_build_ver +.global g_reserve_flags +.global g_cme_hcode_offset +.global g_cme_hcode_length +.global g_cme_common_ring_offset +.global g_cme_common_ring_length +.global g_cme_pstate_region_offset +.global g_cme_pstate_region_length +.global g_cme_core_spec_ring_offset +.global g_cme_core_spec_ring_length +.global g_cme_core_scom_offset +.global g_cme_core_scom_length + +#----------------------------------------------------- +# CPMR HEADER +#----------------------------------------------------- +# Word 0 | Word 1 +#----------------------------------------------------- +# ATTN Opcode | ATTN Opcode +#----------------------------------------------------- +# Magic Number +#----------------------------------------------------- +# Build Date | Version +#----------------------------------------------------- +# Reserved Flags +#----------------------------------------------------- +# CME Hcode Offset | CME Length +#----------------------------------------------------- +# CME Cmn Ring Offset | CME common ring length +#----------------------------------------------------- +# CME Pstate offset | CME Pstate length +#----------------------------------------------------- +# Core spec ring offset | Core spec ring length +#----------------------------------------------------- +# Core SCOM restore | Core SCOM restore length +# offset +#----------------------------------------------------- +# ATTN Opcodes +#----------------------------------------------------- +_start: + +g_cpmr_attn_quad: +.quad 0x0000020000000200 #ATTN OPCODE ATTN OPCODE + +g_cpmr_magic_word: +.quad 0x484F4D4552312E30 #"HOMER1.0" + + g_build_date: +.long 0 + + g_build_ver: +.long 0 + + g_reserve_flags: +.quad 0 + + g_cme_hcode_offset: +.long 0 + + g_cme_hcode_length: +.long 0 + + g_cme_common_ring_offset: +.long 0 + + g_cme_common_ring_length: +.long 0 + + g_cme_pstate_region_offset: +.long 0 + g_cme_pstate_region_length: +.long 0 + +g_cme_core_spec_ring_offset: +.long 0 + +g_cme_core_spec_ring_length: +.long 0 + +g_cme_core_scom_offset: +.long 0 + +g_cme_core_scom_length: +.long 0 diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_header.S b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_header.S new file mode 100755 index 00000000..c7e82da8 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_header.S @@ -0,0 +1,107 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_header.S $ +# +# OpenPOWER HCODE Project +# +# COPYRIGHT 2015,2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + + +#Definition of a CME Image header to be used by CME Hcode when loaded in +#SRAM. Linker script maps this 56 bit image header to an SRAM address range +#after interrupt vector area. Some fields will be populated during Hcode +#image build activity. Build date, version, Hcode offset and position are +#populated during CME Image build process. + +.set BUILD_VER, 0x01 # version * 10 +.section ".cme_image_header" , "aw" + +.global g_cme_magic_word +.global g_cme_build +.global g_cme_build_ver +.global g_cme_hcode_offset +.global g_cme_hcode_length +.global g_cme_cmn_ring_ofset +.global g_cme_cmn_ring_len +.global g_cme_pstate_offset +.global g_cme_pstate_length +.global g_cme_Inst_ring_offset +.global g_cme_Inst_ring_length +.global g_cme_attr_mode +#----------------------------------------------------- +# CME HEADER +#----------------------------------------------------- +# Word 0 | Word 1 +#----------------------------------------------------- +# Magic Number +#----------------------------------------------------- +# Build Date | Version +#----------------------------------------------------- +# CME Hcode Offset | CME Hcode Length +#----------------------------------------------------- +# CME Common Rings | CME Common Rings Sections +# Sections Offset | Length +#----------------------------------------------------- +# CME Quad PState | CME Quad PState Region +# Region Offset | Length +#----------------------------------------------------- +# Core Instance Spec. | Max instance Spec Scan +# Scan Ring Offset | Ring Length +#----------------------------------------------------- +# ATTR_CME_MODE | Reserved +#----------------------------------------------------- +# Reserved +#----------------------------------------------------- + +g_cme_magic_word: +.quad 0x58495020434D454D #XIP CMEM + +g_cme_build: +.long 0 + +g_cme_build_ver: +.long BUILD_VER + +g_cme_hcode_offset: +.long 0 + +g_cme_hcode_length: +.long 0 + +g_cme_cmn_ring_offset: +.long 0 + +g_cme_cmn_ring_len: +.long 0 + +g_cme_pstate_offset: +.long 0 + +g_cme_pstate_length: +.long 0 + +g_cme_Inst_ring_offset: +.long 0 + +g_cme_Inst_ring_length: +.long 0 + +g_cme_attr_mode: +.long 0 diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_img_edit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_img_edit.c new file mode 100644 index 00000000..031d46de --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_img_edit.c @@ -0,0 +1,104 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_img_edit.c $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <stdio.h> +#include <stdint.h> +#include <netinet/in.h> +#include <time.h> + +enum +{ + HCODE_OFFSET_POS = 0x190, + HCODE_LEN_POS = 0x194, + CME_HCODE_OFFSET = 0x200, + CME_BUILD_DATE_POS = 0x188, + CME_BUILD_VER_POS = 0x18C, + CME_BUILD_VER = 0x001, + CPMR_ATTN_WORD0 = 0x00, + CPMR_ATTN_WORD1 = 0x03, + CPMR_BUILD_DATE_POS = 0x10, + CPMR_BUILD_VER_POS = 0x14, + +}; + +int main() +{ + + FILE* pImage = fopen( "./obj/stop_cme/stop_cme.bin", "r+" ); + FILE* pCpmr = fopen( "./obj/stop_cme/cpmrHeader", "r+" ); + time_t buildTime = time(NULL); + struct tm* headerTime = localtime(&buildTime); + + do + { + if( !pImage ) + { + break; + } + + if( !pCpmr ) + { + break; + } + + fseek (pImage, 0, SEEK_END); + uint32_t size = ftell (pImage); + rewind(pImage); + + // cme build date yyyymmdd + fseek ( pImage, CME_BUILD_DATE_POS , SEEK_SET ); + fseek ( pCpmr, CPMR_BUILD_DATE_POS , SEEK_SET ); + uint32_t temp = ( (headerTime->tm_year + 1900) << 16) | + (headerTime->tm_mon << 8) | + (headerTime->tm_mday + 1); + + temp = htonl(temp); + fwrite(&temp, sizeof(uint32_t), 1, pImage ); + fwrite(&temp, sizeof(uint32_t), 1, pCpmr ); + + // cme build version + fseek ( pImage , CME_BUILD_VER_POS, SEEK_SET ); + fseek ( pCpmr , CPMR_BUILD_VER_POS, SEEK_SET ); + temp = htonl(CME_BUILD_VER); + fwrite(&temp, sizeof(uint32_t), 1, pImage ); + fwrite(&temp, sizeof(uint32_t), 1, pCpmr ); + + // cme hcode offset + fseek ( pImage, HCODE_OFFSET_POS , SEEK_SET ); + temp = CME_HCODE_OFFSET; + temp = htonl(temp); + fwrite(&(temp), sizeof(uint32_t), 1, pImage ); + + // cme hcode length + fseek ( pImage , HCODE_LEN_POS , SEEK_SET ); + temp = htonl( size ); + fwrite(&temp, sizeof(uint32_t), 1, pImage ); + + fclose(pImage); + fclose(pCpmr); + } + while(0); + + return 0; +} diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c index af473ea4..dcde15aa 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c @@ -25,6 +25,7 @@ #include "p9_cme_stop.h" #include "p9_cme_stop_exit_marks.h" +#include "p9_cme_copy_scan_ring.h" extern CmeStopRecord G_cme_stop_record; @@ -163,7 +164,10 @@ p9_cme_stop_exit() do //catchup loop { - // todo PK_TRACE("BCE Runtime Kickoff"); + PK_TRACE("BCE Runtime Kickoff"); + + //right now a blocking call. Need to confirm this. + instance_scan_init(); // todo for catch up case //PK_TRACE("X1: Request PCB Arbiter"); @@ -366,8 +370,13 @@ p9_cme_stop_exit() //========================== MARK_TAG(SX_BCE_CHECK, core) + //========================== - // todo PK_TRACE("BCE Runtime Check"); + if( BLOCK_COPY_SUCCESS != isScanRingCopyDone() ) + { + PK_TRACE("BC2: Copy of Instance Specific Scan ring failed"); + // TODO should return an error code. + } // todo //PK_TRACE("X11: XIP Customized Scoms"); @@ -463,7 +472,7 @@ p9_cme_stop_exit() PK_TRACE("XF: Now Wakeup the Core(pm_exit=1)"); out32(CME_LCL_SICR_OR, core << SHIFT32(5)); - PK_TRACE("XF: Polling for Core Wakeup(pm_active=0)"); +// PK_TRACE("XF: Polling for Core Wakeup(pm_active=0)"); while((in32(CME_LCL_EINR)) & (core << SHIFT32(21))); diff --git a/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk b/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk index 4112e534..5de4bc57 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk +++ b/import/chips/p9/procedures/ppe_closed/cme/topfiles.mk @@ -43,8 +43,9 @@ STOP-C-SOURCES = stop_cme/p9_cme_stop_irq_handlers.c \ stop_cme/p9_hcd_core_scominit.c \ stop_cme/p9_hcd_core_scomcust.c \ stop_cme/p9_hcd_core_ras_runtime_scom.c \ - stop_cme/p9_hcd_core_occ_runtime_scom.c -TOP-S-SOURCES = + stop_cme/p9_hcd_core_occ_runtime_scom.c \ + stop_cme/p9_cme_copy_scan_ring.c +TOP-S-SOURCES = stop_cme/p9_cme_header.S TOP_OBJECTS = $(TOP-C-SOURCES:.c=.o) $(TOP-S-SOURCES:.S=.o) PSTATE_OBJECTS = $(PSTATE-C-SOURCES:.c=.o) diff --git a/import/chips/p9/procedures/ppe_closed/lib/Makefile b/import/chips/p9/procedures/ppe_closed/lib/Makefile new file mode 100644 index 00000000..67565547 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/lib/Makefile @@ -0,0 +1,56 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: import/chips/p9/procedures/ppe_closed/lib/Makefile $ +# +# OpenPOWER HCODE Project +# +# COPYRIGHT 2015,2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# This Makefile currently builds a single archive, 'libhcode.a', from +# various library source files. +# +# part of the complete application build. +# + +#all generated files from this makefile will end up in obj/$(IMAGE_NAME)/common +export SUB_OBJDIR = /hcodelib + +include img_defs.mk +include hcodelibfiles.mk + +OBJS := $(addprefix $(OBJDIR)/, $(LIBCOMMON_OBJECTS)) + +libhcode.a: local + $(AR) crs $(OBJDIR)/libhcode.a $(OBJDIR)/*.o + +.PHONY: clean + +local: $(OBJS) + +$(OBJS) $(OBJS:.o=.d): | $(OBJDIR) + +$(OBJDIR): + mkdir -p $(OBJDIR) + +clean: + rm -fr $(OBJDIR) + +ifneq ($(MAKECMDGOALS),clean) +#include $(OBJS:.o=.d) +endif diff --git a/import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk b/import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk new file mode 100644 index 00000000..ba9b9c09 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk @@ -0,0 +1,50 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: import/chips/p9/procedures/ppe_closed/lib/hcodelibfiles.mk $ +# +# OpenPOWER HCODE Project +# +# COPYRIGHT 2015,2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# @file libcommonfiles.mk +# +# @brief mk for libcommon.a object files +# +# @page ChangeLogs Change Logs +# @section ofiles.mk +# @verbatim +# +# +# Change Log ****************************************************************** +# Flag Defect/Feature User Date Description +# ------ -------------- ---------- ------------ ----------- +# +# @endverbatim +# +########################################################################## +# INCLUDES +########################################################################## + +C-SOURCES = \ + p9_hcd_block_copy.c + + +S-SOURCES = + +LIBCOMMON_OBJECTS = $(C-SOURCES:.c=.o) $(S-SOURCES:.S=.o) diff --git a/import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.c b/import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.c new file mode 100644 index 00000000..6e41d3e8 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.c @@ -0,0 +1,147 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.c $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file p9_hcd_block_copy.c +/// @brief initiates a data transfer by block copy from HOMER to CME SRAM. +/// +// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com> +// *HWP FW Owner: Prem S Jha <premjha2@in.ibm.com> +// *HWP Team: PM +// *HWP Level: 2 +// *HWP Consumed by: CME/SGPE +// +#include <stdint.h> +#include "pk.h" +#include "ppe42.h" +#include "ppe42_scom.h" +#include "cmehw_common.h" +#include "gpehw_common.h" +#include "p9_hcd_block_copy.h" +#include "cme_register_addresses.h" + +enum +{ + CME_PER_QUAD = 0x0002, +}; + +//------------------------------------------------------------------------------------ + +void initCmeBceBarAddr( uint8_t i_barIndex, uint64_t i_barRegData, uint8_t i_cmePos ) +{ + uint32_t l_bceBarAddr = (i_barIndex == 0 ) ? SCOM_ADDR_BCEBAR0 : SCOM_ADDR_BCEBAR1; + uint64_t l_bceBarData = 0; + int rc = 0; + + uint8_t l_quadId = i_cmePos >> 1; + + l_bceBarAddr = SGPE_SCOM_ADDR( l_bceBarAddr, l_quadId, i_cmePos ); + + l_bceBarData = (( i_barRegData & 0x0000000FFFFFFFFF ) << BASE_SHIFT_POS); + l_bceBarData |= (ENABLE_WR_SCOPE | ENABLE_RD_SCOPE | BLOCK_COPY_SIZE_1MB ); + PPE_PUTSCOM(l_bceBarAddr, l_bceBarData); // set the source address for block copy + +} + +//------------------------------------------------------------------------------------ + +void startCmeBlockCopy( uint64_t i_cmeStartBlk, uint32_t i_blockLength, uint32_t i_cmePos, + InitiatorPlat_t i_plat, uint8_t i_barIndex, uint32_t i_mbaseVal ) +{ + int rc = 0; + + uint64_t l_bceStatusData = ((START_BLOCK_COPY) | // starts block copy operation + (RD_FROM_HOMER_TO_SRAM) | // sets direction of copy HOMER to CME SRAM + ((i_barIndex == 0) ? SEL_BCEBAR0 : SEL_BCEBAR1) | // BAR register to be used for accessing main memory base + (SET_RD_PRIORITY_0) | // No priority set + ((i_cmeStartBlk & 0x0000FFF ) << SBASE_SHIFT_POS) | //copy page to this SRAM Block. + (((uint64_t) i_blockLength & 0x00007FF) << NUM_BLK_SHIFT_POS ) | // number of blocks to be copied + (((uint64_t) i_mbaseVal & 0x00000000003FFFFF) )); + + if( PLAT_CME == i_plat ) + { + // for CME platform use local address for register BCECSR. + // using BCECSR SCOM address will not work as it is meant + // for entities external to CME. + uint32_t l_cmeBceAddr = CME_LCL_BCECSR; + out64( l_cmeBceAddr, l_bceStatusData ); + } + else if( PLAT_SGPE == i_plat ) + { + //getting quad id by dividing cme pos with 2 + uint8_t l_quadId = i_cmePos >> 1; + + uint32_t l_sgpeBceAddr = SGPE_SCOM_ADDR( SCOM_ADDR_BCEBCSR, l_quadId, i_cmePos ); + PPE_PUTSCOM(l_sgpeBceAddr, l_bceStatusData ); + } +} + +//------------------------------------------------------------------------------------ + +BceReturnCode_t checkCmeBlockCopyStatus( uint32_t i_cmePos, InitiatorPlat_t i_plat ) +{ + BceReturnCode_t l_bcRetCode = BLOCK_COPY_IN_PROGRESS; + + do + { + uint64_t l_bceStatusData = 0; + int rc = 0; + + if( PLAT_CME == i_plat ) + { + // for CME platform use local address for register BCECSR. + // using BCECSR SCOM address will not work as it is meant + // for entities external to CME. + uint32_t l_cmeBcelAddr = CME_LCL_BCECSR; + l_bceStatusData = in64(l_cmeBcelAddr); + // CME reading block copy engine status + out64(l_cmeBcelAddr, l_bceStatusData ); + } + else if( PLAT_SGPE == i_plat ) + { + // getting quad id by dividing cme pos with 2 + uint8_t l_quadId = i_cmePos >> 1; + + uint32_t l_sgpeBceAddr = SGPE_SCOM_ADDR( SCOM_ADDR_BCEBCSR, l_quadId, i_cmePos ); + // SGPE reading block copy engine status of CME + PPE_GETSCOM(l_sgpeBceAddr, l_bceStatusData); + } + + if( CHECK_ERROR & l_bceStatusData ) // checking if block copy engine reported an error. + { + l_bcRetCode = BLOCK_COPY_FAILED; // abort the block copy + break; + } + + if( !(l_bceStatusData & CHECK_BUSY) ) // check if block copy is done. + { + l_bcRetCode = BLOCK_COPY_SUCCESS; // block copy completed. + break; + } + } + while(0); + + return l_bcRetCode; +} diff --git a/import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.h b/import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.h new file mode 100644 index 00000000..51fb2239 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.h @@ -0,0 +1,129 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/lib/p9_hcd_block_copy.h $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __P9_HCD_BLOCK_COPY_H__ +#define __P9_HCD_BLOCK_COPY_H__ +#include <stdint.h> + +//config values associated with CME Block Copy Engine. +typedef enum +{ + ENABLE_WR_SCOPE = 0x0000000000000010, + ENABLE_RD_SCOPE = 0x0000000000000040, + BLOCK_COPY_SIZE_1MB = 0x0000000000000001, + START_BLOCK_COPY = 0x2000000000000000, + RD_FROM_HOMER_TO_SRAM = 0x0800000000000000, + SEL_BCEBAR0 = 0x0000000000000000, + SEL_BCEBAR1 = 0x0400000000000000, + SET_RD_PRIORITY_0 = 0x0000000000000000, + SET_SBASE = 0x0000000000000000, + CHECK_BUSY = 0x8000000000000000, + CHECK_ERROR = 0x4000000000000000, + BAR_INDEX_0 = 0x00, + BAR_INDEX_1 = 0x01, + +} BceConfigVal_t; + +//Return codes associated with Block Copy Engine. +typedef enum +{ + BLOCK_COPY_SUCCESS = 0, + BLOCK_COPY_SCOM_FAIL = 1, + BLOCK_COPY_FAILED = 2, + BLOCK_COPY_INVALID_ARG = 3, + BLOCK_COPY_IN_PROGRESS = 4, +} BceReturnCode_t; + +//Platforms that can request block copy transfer. +typedef enum +{ + PLAT_NA = 0, + PLAT_CME = 1, + PLAT_SGPE = 2, +} InitiatorPlat_t; + +// SCOM addresses associated with a CME BCE. +typedef enum +{ + SCOM_ADDR_BCEBAR0 = 0x10012010, + SCOM_ADDR_BCEBAR1 = 0x10012011, + SCOM_ADDR_BCEBCSR = 0x1001200F, + SCOM_ADDR_PBABAR0 = 0x05012B00, +} ScomAddrList_t; + +// Bit shifts needed for various fields of CME's BCESCR register +enum +{ + BASE_SHIFT_POS = 20, + NUM_BLK_SHIFT_POS = 36, + SBASE_SHIFT_POS = 24, + CME_BASE_ADDRESS = 0x10012000, +}; + +#define SGPE_SCOM_ADDR(addr, quad, ex) (addr | CME_BASE_ADDRESS | (quad << 24) | (ex << 10) ) + +#define PPE_GETSCOM(addr, data) \ + rc = getscom(0, addr, &data); \ + if (rc) { \ + PK_TRACE("getscom@%d failed w/rc=0x%08x", \ + addr, rc); \ + pk_halt(); \ + } + +#define PPE_PUTSCOM(addr, data) \ + rc = putscom(0, addr, data); \ + if (rc) { \ + PK_TRACE("putscom@%d failed w/rc=0x%08x", \ + addr, rc); \ + pk_halt(); \ + } +/// @brief accomplishes block copy from mainstore to CME SRAM. +/// @param [in] i_cmeStartBlk Block no associated with CME SRAM( a block is 32B ) +/// @param [in] i_blockLength number of block to be transferred. +/// @param [in] i_cmePos Position of CME in the P9 chip. +/// @param [in] i_plat platform requesting block copy transfer. +/// @param [in] i_mbaseVal main memory block index from where block copy begins. +/// @note It is a non blocking function. It doesn't poll the status and error bits. +/// It is expected to be called by CME and SGPE only. +void startCmeBlockCopy( uint64_t i_cmeStartBlk, uint32_t i_blockLength, + uint32_t i_cmePos, InitiatorPlat_t i_plat, uint8_t i_barIndex, + uint32_t i_mbaseVal ); + +/// @brief accomplishes block copy from mainstore to CME SRAM. +/// @param [in] i_cmePos Position of CME in the P9 chip. +/// @param [in] i_plat platform requesting block copy transfer. +/// @retVal BLOCK_COPY_SUCCESS is block succeeds, return code otherwise. +/// @note It is a non blocking function. It doesn't poll the status and error bits. +/// It is expected to be called by CME and SGPE only. +BceReturnCode_t checkCmeBlockCopyStatus( uint32_t i_cmePos, InitiatorPlat_t i_plat ); + +/// @brief initializes the BCENARn register. +/// @param [in] i_plat platform calling CME's block copy engine. +/// @param [in] i_barIndex 0 for BCEBAR0 and 1 for BCEBAR1 +/// @param [in] i_barRegData address to be written to BCEBARn +/// @param [in] i_cmePos position of CME. +/// @note No PPE other than SGPE is expected to call this function. It is expected to +/// be called by SGPE only. +void initCmeBceBarAddr( uint8_t i_barIndex, uint64_t i_barRegData, uint8_t i_cmePos ); +#endif diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/link.cmd b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/link.cmd index 784d3058..fb89248b 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/link.cmd +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/link.cmd @@ -35,7 +35,8 @@ OUTPUT_FORMAT(elf32-powerpc); // GPE3 is loaded at 0xfff30000 #define SRAM_START 0xfff30000 #define SRAM_LENGTH 0x10000 -#define PPE_DEBUG_PTRS_OFFSET 0x180 +#define PPE_DEBUG_PTRS_OFFSET 0x1C0 +#define SGPE_IMAGE_OFFSET 0x180 MEMORY { @@ -56,6 +57,13 @@ SECTIONS _VECTOR_START = .; .vectors _VECTOR_START : { *(.vectors) } > sram + _SGPE_IMG_HEADER = _VECTOR_START + SGPE_IMAGE_OFFSET; + /////////////////////////////////////////////////////////////////////////// + // + // SGPE Image Header + // + /////////////////////////////////////////////////////////////////////////// + .sgpe_image_header _SGPE_IMG_HEADER : { *(.sgpe_image_header) } > sram /////////////////////////////////////////////////////////////////////////// // Debug Pointers Table @@ -119,4 +127,5 @@ SECTIONS . = . + INITIAL_STACK_SIZE; _PK_INITIAL_STACK = . - 1; + } diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.c new file mode 100644 index 00000000..2b681377 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.c @@ -0,0 +1,394 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.c $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include "p9_sgpe_stop.h" +#include "pk_api.h" +#include "kernel.h" +#include "gpehw_common.h" +#include "p9_hcd_block_copy.h" +#include "p9_hcd_sgpe_boot_cme.h" +#include "p9_stop_util.H" + +/** + * @brief Summarizes all constants associated with CME boot firmware. + */ +enum +{ + ZERO = 0, + MAX_CME_PER_CHIP = MAX_EXES, + CHECK_BIT = 0x8000, // input vector is big endian + SCOM_ADDR_CME_FLAGS = 0x10012020, + CPMR_POSITION = 0x00200000, + CME_IMG_HDR_OFFSET_POS = 0x20, + CME_HCODE_LEN_POS = 0x24, + CME_FLAG_SHIFT_POS = 0x1E, + SCOM_ADDR_CME_XCR = 0x10012030, + RESUME_PPE_OPERATION = 0x2000000000000000ll, // Resume PPE + HARD_RESET_PPE = 0x6000000000000000ll, // Hard Reset PPE + SBASE_FIRST_BLOCK_COPY = 0, // corresponds to address 0xFFFF8000 + INACTIVE_CORE = 0x00, + EVEN_CORE_ACTIVE = 0x01, + ODD_CORE_ACTIVE = 0x02, + BOTH_CORE_ACTIVE = 0x03, + BCEBAR0 = 0, + BCEBAR1 = 1, + SCOM_ADDR_CCSR = 0x0006C090, + CHECK_BIT_DWORD = 0x8000000000000000ll, + SET_ADDR_MSB = 0x80000000, + CME_STOP_READY = 0x80000000, + SCOM_ADDR_CORE_CPMMR_CLR = 0x2E0F0107, + WKUP_NOTIFY_SELECT = 0x00040000, + CME_BOOT_TIMEOUT = 0x32, + CME_BCE_TIMEOUT = 0x32, + WRITE_CLR_ALL = 0xFFFFFFFFF, + SCOM_ADDR_CME_FWMODE_CLR = 0x1001201B, + SCOM_ADDR_CME_FWMODE_OR = 0x1001201C, + BCESCR_OVERRIDE_ENABLE = 0x10000000, + CME_BLOCK_READ_SIZE = 0x20, +}; + + +//CPMR Header Description + +//CPMR Header Description +//CPMR = HOMER + 1 MB +//---------------------------------------- CPMR +// ATTN Word | ATTN Word +//---------------------------------------- CPMR +8 +//Magic Number +//---------------------------------------- CPMR + 0x10 +//Build Date | Build Time +//---------------------------------------- CPMR + 0x18 +// | | | | | | |Fuse Mode +//---------------------------------------- CPMR + 0x20 +//CME Image Offset | Hcode Length +//---------------------------------------- CPMR + 0x28 +//Common Ring | Ring Length +//----------------------------------------- CPMR + 0x30 +//PState Offset | Pstate Region Length +//----------------------------------------- CPMR + 0x38 +// Reserved +//----------------------------------------- + +BootErrorCode_t boot_cme( uint16_t i_bootCme ) +{ + BootErrorCode_t l_retCode = CME_BOOT_SUCCESS; + + do + { + int rc = 0; + uint64_t l_dataReg = 0; + uint64_t l_dataCCSR = 0; + PPE_GETSCOM(SCOM_ADDR_CCSR, l_dataCCSR); + + uint8_t l_corePos = 0; + uint8_t l_cmeIndex = 0; + uint8_t activeCmeList[MAX_CME_PER_CHIP] = {ZERO}; + uint8_t activeCmeCnt = 0; + uint8_t cmeInitSuccessCnt = 0; + uint8_t quadId = 0; + uint32_t l_scomAddr = 0; + + for( l_cmeIndex = 0; l_cmeIndex < MAX_CME_PER_CHIP; l_cmeIndex++ ) + { + // Step 1. Screen Valid CME for boot + + // vector contains a list of all CMEs that need to be booted. + // is a given CME in that list. First of all let us ensure that. + if( !(i_bootCme & (CHECK_BIT >> l_cmeIndex)) ) + { + // given CME is not in list of CME to be booted. + // skipping. + continue; + } + + uint32_t coreCnt = 0; + //check which core within EX is configured. value of coreCnt + //will reflect how many cores in CME have been found active. + //---------------------------------------------------- + // coreCnt Value Interpretation + //---------------------------------------------------- + // 0 | No active core in given CME + // --------------------------------------------------- + // EVEN_CORE_ACTIVE | even core is active + // --------------------------------------------------- + // ODD_CORE_ACTIVE | Odd core is active + // --------------------------------------------------- + // EVEN_CORE_ACTIVE + | Both core active in given CME + // ODD_CORE_ACTIVE | + // --------------------------------------------------- + l_corePos = l_cmeIndex << 1; + coreCnt = ( l_dataCCSR & (CHECK_BIT_DWORD >> l_corePos) ) ? EVEN_CORE_ACTIVE : INACTIVE_CORE; + coreCnt += ( l_dataCCSR & (CHECK_BIT_DWORD >> (l_corePos + 1)) ) ? ODD_CORE_ACTIVE : INACTIVE_CORE; + + if( ZERO == coreCnt ) + { + // No core within EX is active. SGPE can skip this CME. Booting this CME achieves nothing. + PK_TRACE("Both core in Ex is bad - escaping CME %d", l_cmeIndex); + continue; + } + + // Update CME state to Flag register + quadId = l_cmeIndex >> 1; + activeCmeList[l_cmeIndex] = coreCnt; + l_scomAddr = SGPE_SCOM_ADDR( SCOM_ADDR_CME_FLAGS, + quadId, + l_cmeIndex ); + + PPE_PUTSCOM( l_scomAddr, WRITE_CLR_ALL ); // clear all bits first. + //Writing core status as found in CCSR + l_dataReg = activeCmeList[l_cmeIndex]; + PPE_PUTSCOM( l_scomAddr, (l_dataReg << CME_FLAG_SHIFT_POS) ) + + // core is available and CME can attempt to boot it. + // From SGPE platform, let us first get control of Block copy engine. + l_scomAddr = SGPE_SCOM_ADDR( SCOM_ADDR_CME_FWMODE_OR, + quadId, + l_cmeIndex ); + PPE_PUTSCOM( l_scomAddr, BCESCR_OVERRIDE_ENABLE ); //Disables BCE access via CME's Local register. + + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + // Step 2. Configure Block Copy Engine for copy of CME Image and common scan rings. + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + + // call boot loader to initiate first block copy. It shall copy CME Header, + // CME Hcode, CME Common Scan rings, Parameter Block to CME's SRAM. + + //CME's first block copy data resides at a known offet wrt to start + //of chip' HOMER. This offset is updated in a specific field of + //CPMR Header area of chip's HOMER. Let us read that field and + //find out the offset. + + uint64_t l_cpmrAddr = 0; + PPE_GETSCOM(SCOM_ADDR_PBABAR0, l_cpmrAddr); // get start of HOMER for the chip. + PK_TRACE("PBABAR0 Data 0x%016llx ", l_cpmrAddr ); + l_cpmrAddr += CPMR_POSITION; // offset to CPMR + + //Reading CPMR header to determine : + //1. start of CME Image + //2. Length of first block copy + HomerImgDesc_t* pCpmrHdrAddr = (HomerImgDesc_t*)(CPMR_POSITION | SET_ADDR_MSB); // Set MSB to point OCI to PBA + uint32_t l_blockCopyLength = 0; + + // This offset must be multiple of 32B. This is to facilitate quick calculation of MBASE for BCE. + // It is expected to be done during Hcode Image Build + uint32_t l_hdrToSectionOffset = pCpmrHdrAddr->cmeImgOffset; // Hcode Offset wrt CPMR Hdr start. + + l_blockCopyLength = pCpmrHdrAddr->cmeImgLength; // CME Image length + l_blockCopyLength += pCpmrHdrAddr->cmeCommonRingLength; // adding common ring length + l_blockCopyLength += pCpmrHdrAddr->cmePstateLength; // adding Pstate region length + PK_TRACE("Block Copy Length in bytes0x%08x Main Mem Hcode Addr 0x%016llx", + l_blockCopyLength, l_cpmrAddr ); + + //rounding off length to CME's read block size i.e. 32 bytes + l_blockCopyLength = ((l_blockCopyLength + (CME_BLOCK_READ_SIZE - 1 )) / CME_BLOCK_READ_SIZE); + + // update BCEBAR0 with start of CME hcode region + // update BCEBAR1 with start of CME's instance specific ring region + + initCmeBceBarAddr( BCEBAR0, l_cpmrAddr, l_cmeIndex ); + + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + // Step 3. Configure BCE for second block copy + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + initCmeBceBarAddr( BCEBAR1, l_cpmrAddr , l_cmeIndex ); + + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + // Step 4. Start Block Copy + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + startCmeBlockCopy( SBASE_FIRST_BLOCK_COPY, l_blockCopyLength, l_cmeIndex, + PLAT_SGPE, 0, l_hdrToSectionOffset ); + + activeCmeCnt++; + } + + l_retCode = BLOCK_COPY_SCOM_FAIL; + + if( 0 == activeCmeCnt ) + { + PK_TRACE("Boot not initiated for any CME" ); + break; + } + + uint32_t l_copyStatus = 0; + uint8_t l_cmeWaitTime = 0; + + while( l_cmeWaitTime < CME_BCE_TIMEOUT ) + { + // we have started first block copy for every functional CME. Let us check if block copy is done or not. + for( l_cmeIndex = 0; l_cmeIndex < MAX_CME_PER_CHIP; l_cmeIndex++ ) + { + // check if block copy was started on this CME. + if( INACTIVE_CORE == activeCmeList[l_cmeIndex] ) + { + // block copy was not initiated on this. so skip this CME + continue; + } + + l_copyStatus = checkCmeBlockCopyStatus( l_cmeIndex, PLAT_SGPE ); + + if( BLOCK_COPY_IN_PROGRESS == l_copyStatus ) + { + // block copy on CME was started but it is still in progress + continue; + } + + if( BLOCK_COPY_FAILED == l_copyStatus ) + { + PK_TRACE(" block copy failed for CME 0x%08x", l_cmeIndex ); + l_retCode = BLOCK_COPY_SCOM_FAIL; + // for now abandon booting if a block copy fails on some CME. + cmeInitSuccessCnt = activeCmeCnt; + break; + } + + l_retCode = BLOCK_COPY_SUCCESS; // atleast one CME's block copy engine was success. + quadId = (l_cmeIndex >> 1); + + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + // Step 5. Configure BCE for copy of Core SCOM Restore Area: -TODO + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + // Step 6. SGPE Starts CME + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + + // SGPE now should release the control of block copy engine. + // Once it kicks off CME, during its initialization, CME will try to block + // copy its instance specific scan rings. For that to succeed, SGPE must clear + // BCECSR_OVERRIDE_EN bit in CME_FWMODE register. + l_scomAddr = SGPE_SCOM_ADDR( SCOM_ADDR_CME_FWMODE_CLR, + quadId, + l_cmeIndex ); + PPE_PUTSCOM( l_scomAddr, BCESCR_OVERRIDE_ENABLE ); // release control back to local CME BCECSR + + //Writing to CME's XCR to Hard Reset it + l_scomAddr = SGPE_SCOM_ADDR(SCOM_ADDR_CME_XCR, + quadId, + l_cmeIndex ); + + l_dataReg = HARD_RESET_PPE; + PPE_PUTSCOM( l_scomAddr, l_dataReg ); + + // Kick off CME by giving resume command through PPE External Control Register + // Writing to XCR to resume PPE operation + l_dataReg = RESUME_PPE_OPERATION; + PPE_PUTSCOM( l_scomAddr, l_dataReg ); + cmeInitSuccessCnt++; + } + + pk_sleep( PK_MILLISECONDS(2)); + l_cmeWaitTime++; + } + + + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + // Step 7, 8,9 is accomplished on CME platform + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + // Step 10. All CME Kicked off. Check if CME STOP function is ready + // ----------------------------------------------------------------- + // ----------------------------------------------------------------- + + if( BLOCK_COPY_SUCCESS == l_copyStatus ) + { + uint32_t cmeReadyList = 0; + l_cmeWaitTime = 0; + + while( l_cmeWaitTime < CME_BOOT_TIMEOUT ) + { + // Need to check if all CME were able to complete booting + quadId = 0; + + for( l_cmeIndex = 0; l_cmeIndex < MAX_CME_PER_CHIP; l_cmeIndex++ ) + { + if( INACTIVE_CORE == activeCmeList[l_cmeIndex] ) + { + continue; + } + + uint32_t l_cmeActiveBit = CHECK_BIT >> l_cmeIndex; + + if( cmeReadyList & l_cmeActiveBit ) + { + // CME Active and Boot successful already + continue; + } + + quadId = (l_cmeIndex >> 1); + l_scomAddr = SGPE_SCOM_ADDR( SCOM_ADDR_CME_FLAGS, + quadId, + l_cmeIndex ); + + PPE_GETSCOM( l_scomAddr, l_dataReg ); + + if( l_dataReg & CME_STOP_READY ) + { + if( EVEN_CORE_ACTIVE == activeCmeList[l_cmeIndex] || + BOTH_CORE_ACTIVE == activeCmeList[l_cmeIndex] ) + { + //FIXME get scom address + //clear CPMMR[WKUP_NOTIFY_SELECT] + l_scomAddr = GPE_SCOM_ADDR_CORE( SCOM_ADDR_CORE_CPMMR_CLR, (l_cmeIndex << 1 )); + l_dataReg = WKUP_NOTIFY_SELECT; + PPE_PUTSCOM( l_scomAddr, l_dataReg ); + } + + if( ODD_CORE_ACTIVE == activeCmeList[l_cmeIndex] || + BOTH_CORE_ACTIVE == activeCmeList[l_cmeIndex] ) + { + //FIXME get scom address + //clear CPMMR[WKUP_NOTIFY_SELECT] + l_scomAddr = GPE_SCOM_ADDR_CORE( SCOM_ADDR_CORE_CPMMR_CLR, ((l_cmeIndex << 1) + 1 )); + l_dataReg = WKUP_NOTIFY_SELECT; + PPE_PUTSCOM( l_scomAddr, l_dataReg ); + } + + cmeReadyList = cmeReadyList | l_cmeActiveBit; + } + }//end for + + pk_sleep( PK_MILLISECONDS(2)); + l_cmeWaitTime++; + } // boot timeout + } //if all CME kicked off + } + while(0); + + return l_retCode; +} diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.h new file mode 100644 index 00000000..50f05043 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.h @@ -0,0 +1,43 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_hcd_sgpe_boot_cme.h $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __P9_HCD_SGPE_BOOT_H__ +#define __P9_HCD_SGPE_BOOT_H__ + + +//Error code associated with CME boot firmware. +typedef enum +{ + CME_BOOT_SUCCESS = 0, + CME_BOOT_FAIL = 1, +} BootErrorCode_t; + +/// @brief boots CME by initiating first block copy transfer. +/// @param[in] i_exMask mask associated with EX. +/// @note Each instance of CME is assigned a specifc bit position in +/// big endian order. Bit 0 positions stands for CME0 and bit 11 +/// stands for CME11. +BootErrorCode_t boot_cme( uint16_t i_exMask ); + +#endif diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_image_header.S b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_image_header.S new file mode 100644 index 00000000..6ae0b8a0 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_image_header.S @@ -0,0 +1,102 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_image_header.S $ +# +# OpenPOWER HCODE Project +# +# COPYRIGHT 2015,2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +#Definition of a SGPE Image header to be used by SGPE Hcode when loaded in +#SRAM. Linker script maps this 64 bit image header to an SRAM address starting from +#0xffff8180.Some fields will be populated during Hcode image build activity. Build date, +#version, IVPR address, __system_reset_address are populated during SGPE image build +#process. + +.section ".sgpe_image_header" , "aw" + +.global g_sgpe_magic_word +.global g_sgpe_reset_address +.global g_sgpe_reserve1 +.global g_sgpe_ivpr_address +.global g_sgpe_reserve2 +.global g_sgpe_build_date +.global g_sgpe_build_ver +.global g_sgpe_resv_flag +.global g_sgpe_cmn_ring_occ_offset +.global g_sgpe_spec_ring_occ_offset +.global g_sgpe_cmn_scom_offset +.global g_sgpe_reserve3 +.global g_sgpe_reserve4 +.global g_sgpe_reserve5 +#----------------------------------------------------- +# SGPE HEADER +#----------------------------------------------------- +# Word 0 | Word 1 +#----------------------------------------------------- +# Magic Number +#----------------------------------------------------- +# __system_reset_address| Reserved +#----------------------------------------------------- +# IVPR address | Reserved +#----------------------------------------------------- +# Build Date | Version +#----------------------------------------------------- +# Reserve Flag +#----------------------------------------------------- +# Quad Cmn Ring Occ | Quad Spec Rings Occ +# Offset | Offset +#----------------------------------------------------- +# Quad Cmn SCOM Occ | Reserved +# Offset | +#----------------------------------------------------- +# Reserved +#----------------------------------------------------- + +g_sgpe_magic_word: +.quad 0x5849502053475045 #XIP SGPE + +g_sgpe_reset_address: +.long 0 + +g_sgpe_reserve1: +.long 0 + +g_sgpe_ivpr_address: +.long 0xFFF30000 + +g_sgpe_reserve2: +.long 0 + +g_sgpe_build_date: +.long 0 + +g_sgpe_build_ver: +.long 0 + +g_sgpe_resv_flag: +.quad 0 + +g_sgpe_cmn_ring_occ_offset: +.long 0 + +g_sgpe_spec_ring_occ_offset: +.long 0 + +g_sgpe_cmn_scom_offset: +.long 0 diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_img_edit.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_img_edit.c new file mode 100644 index 00000000..825ecc02 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_img_edit.c @@ -0,0 +1,94 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_img_edit.c $ */ +/* */ +/* OpenPOWER HCODE Project */ +/* */ +/* COPYRIGHT 2015,2017 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include <stdio.h> +#include <stdint.h> +#include <netinet/in.h> +#include <time.h> + +enum +{ + SGPE_RESET_ADDR_POS = 0x0188, + SGPE_RESET_ADDRESS = 0x40, + SGPE_BUILD_DATE_POS = 0x0198, + SGPE_BUILD_VER_POS = 0x019C, + SGPE_BUILD_VER = 0x01, + QPMR_BUILD_DATE_POS = 0x18, + QPMR_BUILD_VER_POS = 0x1C, +}; + +int main() +{ + + FILE* pImage = fopen( "obj/stop_gpe/stop_gpe.bin", "r+" ); + time_t buildTime = time(NULL); + struct tm* headerTime = localtime(&buildTime); + + FILE* pQpmrHdr = fopen( "obj/stop_gpe/qpmrHeader", "r+" ); + + do + { + if( !pImage ) + { + printf("\n image file not found"); + break; + } + + if(!pQpmrHdr) + { + printf("\n qpmr header not found"); + break; + } + + // populating SGPE Image Header + // populating RESET address + fseek (pImage, SGPE_RESET_ADDR_POS, SEEK_SET); + uint32_t temp = SGPE_RESET_ADDRESS; + temp = htonl(temp); + fwrite(&(temp), sizeof(uint32_t), 1, pImage ); + + //build date + fseek ( pImage , SGPE_BUILD_DATE_POS, SEEK_SET ); + fseek ( pQpmrHdr , QPMR_BUILD_DATE_POS, SEEK_SET ); + // date format same as in XIP Header YYYYMMDD + temp = ((headerTime->tm_mday ) | ((headerTime->tm_mon + 1) << 8) | (headerTime->tm_year + 1900) << 16); + temp = htonl(temp); + fwrite(&temp, sizeof(uint32_t), 1, pImage ); + fwrite(&temp, sizeof(uint32_t), 1, pQpmrHdr ); + //printf("\n temp is 0x%x08", temp ); + + // build ver + fseek ( pImage , SGPE_BUILD_VER_POS, SEEK_SET ); + fseek ( pQpmrHdr , QPMR_BUILD_VER_POS, SEEK_SET ); + temp = htonl(SGPE_BUILD_VER); + fwrite(&temp, sizeof(uint32_t), 1, pImage ); + fwrite(&temp, sizeof(uint32_t), 1, pQpmrHdr ); + + fclose(pImage); + fclose(pQpmrHdr); + } + while(0); + + return 0; +} diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_qpmr.S b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_qpmr.S new file mode 100644 index 00000000..e9807f45 --- /dev/null +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_qpmr.S @@ -0,0 +1,131 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_qpmr.S $ +# +# OpenPOWER HCODE Project +# +# COPYRIGHT 2015,2017 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG + +.section ".qpmr" , "aw", @progbits + +.global g_qpmr_magic_word +.global g_boot_copier_offset +.global g_qpmr_reserve1 +.global g_boot_loader_offset +.global g_boot_loader_length +.global g_build_date +.global g_build_ver +.global g_reserve_flags +.global g_sgpe_hcode_offset +.global g_sgpe_hcode_length +.global g_quad_common_ring_offset +.global g_quad_common_ring_length +.global g_quad_spec_ring_offset +.global g_quad_spec_ring_length +.global g_quad_spec_scom_offset +.global g_quad_spec_scom_length +.global g_quad_cmn_ring_occ_offset +.global g_quad_spec_ring_occ_offset +.global g_quad_common_scom_occ_offset + +#----------------------------------------------------- +# QPMR HEADER +#----------------------------------------------------- +# Word 0 | Word 1 +#----------------------------------------------------- +# Boot Copier Offset | Reserved +#----------------------------------------------------- +# Boot Loader Offset | Boot Length +#----------------------------------------------------- +# Build Date | Version +#----------------------------------------------------- +# Reserved Flags +#----------------------------------------------------- +# SGPE Hcode Offset | SGPE Length +#----------------------------------------------------- +# Quad Cmn Ring Offset | Quad common ring length +#----------------------------------------------------- +# Quad spec ring offset | Quad spec ring length +#----------------------------------------------------- +# Quad spec SCOM offset | Quad spec SCOM length +#----------------------------------------------------- +# quad cmn ring occ | Quad spec ring occ offset +# offset +#----------------------------------------------------- +#quad cmn SCOm OCC Offset | Reserved +#----------------------------------------------------- +# Reserve +#----------------------------------------------------- +_start: + g_qpmr_magic_word: +.quad 0x5849502053475045 #"XIP SGPE" + + g_boot_copier_offset: +.long 0 + + g_qpmr_reserve1: +.long 0 + +g_boot_loader_offset: +.long 0 + + g_boot_loader_length: +.long 0 + + g_build_date: +.long 0 + + g_build_ver: +.long 0 + + g_reserve_flags: +.quad 0 + + g_sgpe_hcode_offset: +.long 0 + + g_sgpe_hcode_length: +.long 0 + + g_quad_common_ring_offset: +.long 0 + + g_quad_common_ring_length: +.long 0 + + g_quad_spec_ring_offset: +.long 0 + g_quad_spec_ring_length: +.long 0 + + g_quad_spec_scom_offset: +.long 0 + + g_quad_spec_scom_length: +.long 0 + + g_quad_cmn_ring_occ_offset: +.long 0 + + g_quad_spec_ring_occ_offset: +.long 0 + + g_quad_common_scom_occ_offset: +.long 0 diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c index 83efa302..53d6e513 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c @@ -25,6 +25,7 @@ #include "p9_sgpe_stop.h" #include "p9_sgpe_stop_exit_marks.h" +#include "p9_hcd_sgpe_boot_cme.h" extern SgpeStopRecord G_sgpe_stop_record; @@ -200,8 +201,10 @@ p9_sgpe_stop_exit() //================================== PK_TRACE("Boot CME"); - //cme_boot(); - + //FIXME cmeBootList to be eventually replaced with actual vector + uint16_t cmeBootList = 0x8000; + boot_cme( cmeBootList ); + //MARK_TRAP(SX_CME_BOOT_END) //======================================= MARK_TAG(SX_RUNTIME_INITS, (32 >> qloop)) //======================================= diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/topfiles.mk b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/topfiles.mk index 190e0540..9863f2eb 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/topfiles.mk +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/topfiles.mk @@ -41,7 +41,9 @@ TOP-C-SOURCES = p9_sgpe_main.c \ p9_hcd_cache_scominit.c \ p9_hcd_cache_scomcust.c \ p9_hcd_cache_occ_runtime_scom.c \ - p9_hcd_cache_ras_runtime_scom.c -TOP-S-SOURCES = + p9_hcd_cache_ras_runtime_scom.c \ + p9_hcd_sgpe_boot_cme.c + +TOP-S-SOURCES = p9_sgpe_image_header.S -TOP_OBJECTS = $(TOP-C-SOURCES:.c=.o) $(TOP-S-SOURCES:.S=.o) +TOP_OBJECTS = $(TOP-C-SOURCES:.c=.o) $(TOP-S-SOURCES:.S=.o) $(TOP-SRC:.C=.o) |
