3 files changed, 27 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/ppe/pk/ppe42/ppe42.h b/import/chips/p9/procedures/ppe/pk/ppe42/ppe42.h
index d7472a29..6acb3bb7 100644
--- a/import/chips/p9/procedures/ppe/pk/ppe42/ppe42.h
+++ b/import/chips/p9/procedures/ppe/pk/ppe42/ppe42.h
@@ -299,13 +299,31 @@ popcount64(uint64_t x)
 
 #if defined(USE_PPE_IMPRECISE_MODE)
 
+#if defined(MASK_MSR_SEM6)
+
+#define PK_THREAD_MACHINE_CONTEXT_DEFAULT \
+    (MSR_UIE | MSR_EE | MSR_ME | MSR_IS0 | MSR_IS1 | MSR_IS2 | MSR_IPE | MSR_SEM6)
+
+#else
+
 #define PK_THREAD_MACHINE_CONTEXT_DEFAULT \
     (MSR_UIE | MSR_EE | MSR_ME | MSR_IS0 | MSR_IS1 | MSR_IS2 | MSR_IPE)
+
+#endif  /*MASK_MSR_SEM6*/
+
+#else
+
+#if defined(MASK_MSR_SEM6)
+
+#define PK_THREAD_MACHINE_CONTEXT_DEFAULT \
+    (MSR_UIE | MSR_EE | MSR_ME | MSR_IS0 | MSR_IS1 | MSR_IS2 | MSR_SEM6)
+
 #else
 
 #define PK_THREAD_MACHINE_CONTEXT_DEFAULT \
     (MSR_UIE | MSR_EE | MSR_ME | MSR_IS0 | MSR_IS1 | MSR_IS2)
 
+#endif  /*MASK_MSR_SEM6*/
 #endif  /*USE_PPE_IMPRECISE_MODE*/
 #endif  /*PK_THREAD_MACHINE_CONTEXT_DEFAULT*/
 
diff --git a/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_msr.h b/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_msr.h
index eab82e27..619f448b 100644
--- a/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_msr.h
+++ b/import/chips/p9/procedures/ppe/pk/ppe42/ppe42_msr.h
@@ -57,6 +57,14 @@
 
 #define MSR_SEM_START_BIT       1
 #define MSR_SEM_LEN             7
+#define MSR_SEM1                0x40000000
+#define MSR_SEM2                0x20000000
+#define MSR_SEM3                0x10000000
+#define MSR_SEM4                0x08000000
+#define MSR_SEM5                0x04000000
+#define MSR_SEM6                0x02000000
+#define MSR_SEM7                0x01000000
+
 #define MSR_SIBRC_START_BIT     9
 #define MSR_SIBRC_LEN           3
 
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h b/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h
index 4fa6a598..439149e4 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h
+++ b/import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h
@@ -38,6 +38,7 @@
 
 #if NIMBUS_DD_LEVEL == 1
     #define HW386841_DD1_PLS_SRR1_DSL_STOP1_FIX 0
+    #define MASK_MSR_SEM6
 #endif
 
 // --------------------