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-rw-r--r--import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H4
-rw-r--r--import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h1
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c8
-rw-r--r--import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c43
4 files changed, 36 insertions, 20 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
index 95f64358..dc962dfc 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
+++ b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
@@ -229,6 +229,7 @@ HCD_CONST(SGPE_STOP_11_TO_8_BIT_POS, 0x10000000)
HCD_CONST(SGPE_ENABLE_CME_TRACE_ARRAY_BIT_POS, 0x08000000)
HCD_CONST(SGPE_VDM_ENABLE_BIT_POS, 0x04000000)
HCD_CONST(SGPE_ENABLE_CHTM_TRACE_CME_BIT_POS, 0x02000000)
+HCD_CONST(SGPE_PHANTOM_HALT_ENABLE_BIT_POS, 0x00800000)
HCD_CONST(SGPE_PROC_FAB_PUMP_MODE_BIT_POS, 0x00004000)
HCD_CONST(SGPE_CACHE_SKEWADJ_DISABLE_BIT_POS, 0x00002000)
HCD_CONST(SGPE_CACHE_DCADJ_DISABLE_BIT_POS, 0x00001000)
@@ -373,6 +374,7 @@ HCD_CONST(CME_STOP_5_TO_4_BIT_POS, 0x20000000)
HCD_CONST(CME_STOP_8_TO_5_BIT_POS, 0x10000000)
HCD_CONST(CME_STOP_11_TO_8_BIT_POS, 0x08000000)
HCD_CONST(CME_VDM_ENABLE_BIT_POS, 0x04000000)
+HCD_CONST(CME_STOP_PHANTOM_HALT_ENABLE_BIT_POS, 0x00800000)
HCD_CONST(CME_STOP_MAPPING_DISABLE_BIT_POS, 0x00000004)
HCD_CONST(CME_QUEUED_SCAN_DISABLE_BIT_POS, 0x00000002)
HCD_CONST(CME_SKIP_CORE_POWEROFF_BIT_POS, 0x00000001)
@@ -383,6 +385,7 @@ HCD_CONST(CME_QM_FLAG_SYS_WOF_ENABLE, 0x1000)
HCD_CONST(CME_QM_FLAG_SYS_DYN_FMIN_ENABLE, 0x0800)
HCD_CONST(CME_QM_FLAG_SYS_DYN_FMAX_ENABLE, 0x0400)
HCD_CONST(CME_QM_FLAG_SYS_JUMP_PROTECT, 0x0200)
+HCD_CONST(CME_QM_FLAG_PSTATE_PHANTOM_HALT_EN, 0x0001)
/// CME Hcode
@@ -508,6 +511,7 @@ HCD_CONST(PGPE_FLAG_WOF_IPC_IMMEDIATE_MODE, 0x0040)
HCD_CONST(PGPE_FLAG_ENABLE_FRATIO, 0x0020)
HCD_CONST(PGPE_FLAG_ENABLE_VRATIO, 0x0010)
HCD_CONST(PGPE_FLAG_VRATIO_MODIFIER, 0x0008)
+HCD_CONST(PGPE_FLAG_PHANTOM_HALT_ENABLE, 0x0001)
/// PGPE Hcode
diff --git a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
index fad58f48..78fe748b 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
+++ b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
@@ -38,7 +38,6 @@
#ifndef _P9_PM_HCDFLAGS_H_
#define _P9_PM_HCDFLAGS_H_
-
#ifndef __PPE_PLAT
namespace p9hcd
{
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c
index bc195d30..2dae6057 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c
@@ -543,8 +543,12 @@ p9_cme_stop_exit()
if (!core)
{
- PK_TRACE_ERR("ERROR: No Wakeup Fired to a Stopped and Enabled Core. HALT CME!");
- PK_PANIC(CME_STOP_EXIT_PHANTOM_WAKEUP);
+ PK_TRACE_ERR("ERROR: No Wakeup Fired to a Stopped and Enabled Core.");
+
+ if (pCmeImgHdr->g_cme_mode_flags & CME_STOP_PHANTOM_HALT_ENABLE_BIT_POS)
+ {
+ PK_PANIC(CME_STOP_EXIT_PHANTOM_WAKEUP);
+ }
}
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c
index 21486d88..6e6e83a4 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c
@@ -302,21 +302,22 @@ p9_sgpe_ipi3_low_handler(void* arg, PkIrqId irq)
static void
p9_sgpe_pig_cpayload_parser(const uint32_t type)
{
- uint32_t timeout = 0;
- uint32_t qloop = 0;
- uint32_t cloop = 0;
- uint32_t cstart = 0;
- uint32_t cindex = 0;
- uint32_t cexit = 0;
- uint32_t center = 0;
- uint32_t cpending = 0;
- uint32_t cpayload = 0;
- uint32_t tpayload = 0;
- uint32_t vector_index = 0;
- uint32_t request_index = 0;
- uint32_t suspend_index = 0;
- uint32_t suspend_mask = 0;
- data64_t scom_data = {0};
+ uint32_t timeout = 0;
+ uint32_t qloop = 0;
+ uint32_t cloop = 0;
+ uint32_t cstart = 0;
+ uint32_t cindex = 0;
+ uint32_t cexit = 0;
+ uint32_t center = 0;
+ uint32_t cpending = 0;
+ uint32_t cpayload = 0;
+ uint32_t tpayload = 0;
+ uint32_t vector_index = 0;
+ uint32_t request_index = 0;
+ uint32_t suspend_index = 0;
+ uint32_t suspend_mask = 0;
+ data64_t scom_data = {0};
+ sgpeHeader_t* pSgpeImgHdr = (sgpeHeader_t*)(OCC_SRAM_SGPE_HEADER_ADDR);
// read typeX interrupt pending status
// then clear interrupt pending status
@@ -497,7 +498,11 @@ p9_sgpe_pig_cpayload_parser(const uint32_t type)
{
PK_TRACE_INF("ERROR: Received Phantom Hardware Type%d Wakeup PIG \
When Wakeup_notify_select = 0. HALT SGPE!", type);
- PK_PANIC(SGPE_PIG_TYPE23_EXIT_WNS_CME);
+
+ if (pSgpeImgHdr->g_sgpe_reserve_flags & SGPE_PHANTOM_HALT_ENABLE_BIT_POS)
+ {
+ PK_PANIC(SGPE_PIG_TYPE23_EXIT_WNS_CME);
+ }
}
}
else
@@ -586,7 +591,11 @@ p9_sgpe_pig_cpayload_parser(const uint32_t type)
{
PK_TRACE_ERR("ERROR: Received Phantom Entry PIG"
" When Wakeup_notify_select = 0. HALT SGPE!");
- PK_PANIC(SGPE_PIG_TYPE23_ENTRY_WNS_CME);
+
+ if (pSgpeImgHdr->g_sgpe_reserve_flags & SGPE_PHANTOM_HALT_ENABLE_BIT_POS)
+ {
+ PK_PANIC(SGPE_PIG_TYPE23_ENTRY_WNS_CME);
+ }
}
#if DISABLE_STOP8
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