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author | Brian Vanderpool <vanderp@us.ibm.com> | 2018-06-19 19:39:32 -0500 |
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committer | hostboot <hostboot@us.ibm.com> | 2018-08-22 17:55:52 -0500 |
commit | 22782e49d66c79268492e6f0d1b65ec073eb3921 (patch) | |
tree | 3a63191adb04596197b0c5375fff911007acc0cc /import | |
parent | 1dcc359d6da60cf309bababe0ac0ea6232f26146 (diff) | |
download | talos-hcode-22782e49d66c79268492e6f0d1b65ec073eb3921.tar.gz talos-hcode-22782e49d66c79268492e6f0d1b65ec073eb3921.zip |
STOP: Clear CPPM_PECES on entry during power save cycle to prevent wakeup events
During the power save cycle, clear stop exit enables to prevent a hw generated
wakeup pig from overwriting the stop entry request. In this mode, SGPE will
read the per thread PSCR information and restore the PECE Shadow
Key_Cronus_Test=PM_REGRESS
Change-Id: I8029f815553e49e12e80f7a0d20c02a7d59e26ea
Original-Change-Id: I2521b38918f23c5dac4aefc59968ead05ad29b4d
CQ: SW433304
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60922
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import')
-rwxr-xr-x | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c | 9 | ||||
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c | 119 |
2 files changed, 128 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c index db55ec4d..c98d2daa 100755 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_entry.c @@ -1646,6 +1646,15 @@ p9_cme_stop_entry() pig.fields.req_intr_payload = G_cme_stop_record.req_level[core_index]; + + // If in block wakeup mode, disable all interrupts so the PPM PIG doesn't + // send one that could overwrite the stop entry request + // The SGPE will restore the CPPM PECE Shadow + if (G_cme_stop_record.core_blockwu & core_mask) + { + CME_PUTSCOM(CPPM_PECES, core_mask, BITS64(32, 4)); + } + // put PIG and Wakeup_Notify_Select back to back as possible send_pig_packet(pig.value, core_mask); diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c index 10ddfb34..ef7d0477 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c @@ -287,6 +287,125 @@ p9_sgpe_stop_entry() } } + for (qloop = 0; qloop < MAX_QUADS; qloop++) + { + // if this ex is not up to entry, skip + if (!(ex = G_sgpe_stop_record.group.ex01[qloop])) + { + continue; + } + + // If this quad is in block exit, copy the PSCR information back to the CPPM PECE Shadow + // Bit 8:13 correspond to 0:5, 8:13, 16:21, and 24:29. Bit 3 corresponds to 32,33,34,35 + if (G_sgpe_stop_record.group.quad[VECTOR_BLOCKX] & BIT32(qloop)) + { + if (G_sgpe_stop_record.group.ex01[qloop] & FST_EX_IN_QUAD) + { + + cindex = qloop << 2; + + if (G_sgpe_stop_record.group.core[VECTOR_CONFIG] & BIT32(cindex)) + { + temp_data.value = 0; + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS00, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) << 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 3; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS01, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)); + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 2; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS02, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 1; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS03, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 16; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)); + + GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(CPPM_PECES, cindex), temp_data.value); + } + + cindex = (qloop << 2) + 1; + + if (G_sgpe_stop_record.group.core[VECTOR_CONFIG] & BIT32(cindex)) + { + temp_data.value = 0; + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS10, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) << 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 3; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS11, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)); + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 2; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS12, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 1; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS13, qloop, 0), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 16; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)); + + GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(CPPM_PECES, cindex), temp_data.value); + } + } + + if (G_sgpe_stop_record.group.ex01[qloop] & SND_EX_IN_QUAD) + { + cindex = (qloop << 2) + 2; + + if (G_sgpe_stop_record.group.core[VECTOR_CONFIG] & BIT32(cindex)) + { + temp_data.value = 0; + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS00, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) << 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 3; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS01, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)); + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 2; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS02, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 1; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS03, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 16; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)); + + GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(CPPM_PECES, cindex), temp_data.value); + } + + cindex = (qloop << 2) + 3; + + if (G_sgpe_stop_record.group.core[VECTOR_CONFIG] & BIT32(cindex)) + { + temp_data.value = 0; + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS10, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) << 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 3; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS11, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)); + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 2; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS12, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 8; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)) << 1; + + GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PSCRS13, qloop, 1), scom_data.value); + temp_data.words.upper = (scom_data.words.upper & BITS32(8, 6)) >> 16; + temp_data.words.lower = (scom_data.words.upper & BIT32(3)); + + GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(CPPM_PECES, cindex), temp_data.value); + } + } + + PK_TRACE("Restored PECES due to block wakeup being active"); + + } + } // Permanent workaround to save cme image size |