PGPE: Fix bad volt updt upon nack

        Key_Cronus_Test=PM_REGRESS

        As part of undervolting code, the nack handling
        was modified to remove any amount of undervolting.
        This is because undervolting can be the cause of
        the droop and hence the nack. However, the original
        code didn't properly account for the freq and voltage
        update ordering. As a result, sometimes voltage would be updated
        before frequency/vdm/resclk update in the wrong order, and
        resulting in droop forever.

Change-Id: Ie1dab7bbdac8c52cfc68d51d45fe0b7e8e5fd183
CQ: SW473697
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82613
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S Still <stillgs@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>

1 files changed, 17 insertions, 2 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
index 4d6348d9..0a8b2226 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
@@ -769,8 +769,23 @@ void p9_pgpe_handle_nacks(uint32_t origTargetCores, uint32_t origExpectedAckFrom
     p.waitForAcks = PGPE_DB_ACK_WAIT_CME;
     p.checkNACKs = PGPE_DB3_SKIP_CHECK_NACKS;
 
-    G_pgpe_pstate_record.wov.target_pct = 0;
-    p9_pgpe_pstate_updt_ext_volt();
+    //IF WOV-Undervolting is enabled, then remove WOV bias
+    if (G_pgpe_pstate_record.wov.status & WOV_UNDERVOLT_ENABLED)
+    {
+        G_pgpe_pstate_record.wov.target_pct = 0; //Clear any WOV bias
+        uint32_t tmpBiasSyspExtVrmNext = G_pgpe_pstate_record.biasSyspExtVrmNext; //Save Next Voltage
+
+        //If Current Voltage != Next Voltage, then we are moving to lower pstate(low frequency/low voltage)
+        //and votlage hasn't been updated yet. To remove WOV bias, we use the current voltage because
+        //the p9_pgpe_pstate_updt_ext_volt function uses next voltage to write the VRMs
+        if (G_pgpe_pstate_record.biasSyspExtVrmCurr != G_pgpe_pstate_record.biasSyspExtVrmNext)
+        {
+            G_pgpe_pstate_record.biasSyspExtVrmNext = G_pgpe_pstate_record.biasSyspExtVrmCurr;
+        }
+
+        p9_pgpe_pstate_updt_ext_volt(); //Do voltage update that is remove any WOV bias
+        G_pgpe_pstate_record.biasSyspExtVrmNext = tmpBiasSyspExtVrmNext; //Restore Next voltage
+    }
 
     //c) Send DB3 (Replay Previous DB0 Operation) to only the CME Quad Managers, and
     //their Sibling CME (if present), that responded with a NACK.