PM: Fix DPLL Status Checking Based on Mode

Change-Id: I1945b78686bace9c7f91f81109d526e10eb51fc6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44436
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

2 files changed, 33 insertions, 22 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
index e599d336..0588864e 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
@@ -547,31 +547,51 @@ inline void p9_cme_pstate_freq_update()
 
         ippm_write(QPPM_DPLL_FREQ, dpllFreq.value);
 
-        if(in32(CME_LCL_FLAGS) & BIT32(CME_FLAGS_VDM_OPERABLE))
+        // DPLL Modes
+        //                     enable_fmin    enable_fmax   enable_jump
+        // DPLL Mode  2             0              0             0
+        // DPLL Mode  3             0              0             1
+        // DPLL Mode  4             X              1             0
+        // DPLL Mode  4             1              X             0
+        // DPLL Mode  3.5           0              1             1
+        // DPLL Mode  5             1              X             1
+        // TODO Future Attributes
+        // DROOP_PROTECT          -> DPLL Mode 3
+        // DROOP_PROTECT_OVERVOLT -> DPLL Mode 3.5
+        // DYNAMIC                -> DPLL Mode 4
+        // DYNAMIC_PROTECT        -> DPLL Mode 5
+
+        uint32_t cme_flags = in32(CME_LCL_FLAGS);
+        data64_t scom_data = { 0 };
+
+        // DPLL Mode 2
+        if(!(cme_flags & BIT32(CME_FLAGS_VDM_OPERABLE)))
         {
-            // TODO DPLL Mode 3.5 will require some other stuffs
-            data64_t scom_data = { 0 };
-
-            PK_TRACE_INF("Poll on DPLL_STAT[update_complete]");
-            // ... to indicate that the DPLL has sampled the newly requested
-            // frequency into its internal registers as a target,
-            // but may not yet be there
+            PK_TRACE_INF("Poll on DPLL_STAT[freq_change=0]");
 
+            // ... to indicate that the DPLL is safely either at the new frequency
+            // or in droop protection below the new frequency
             do
             {
                 ippm_read(QPPM_DPLL_STAT, &scom_data.value);
             }
-            while(!(scom_data.words.lower & BIT32(28)));
+            while((scom_data.words.lower & BIT32(29)));
+        }
 
-            PK_TRACE_INF("Poll on DPLL_STAT[block_active|lock]");
-            // ... to indicate that the DPLL is safely either at the new frequency
-            // or in droop protection below the new frequency
+        // DPLL Mode 3
+        if(cme_flags & BIT32(CME_FLAGS_VDM_OPERABLE))
+        {
+
+            PK_TRACE_INF("Poll on DPLL_STAT[update_complete=1]");
+            // ... to indicate that the DPLL has sampled the newly requested
+            // frequency into its internal registers as a target,
+            // but may not yet be there
 
             do
             {
                 ippm_read(QPPM_DPLL_STAT, &scom_data.value);
             }
-            while(!(scom_data.words.lower & BITS32(30, 2)));
+            while(!(scom_data.words.lower & BIT32(28)));
         }
 
         PK_TRACE_INF("DB_TH: Freq Updt Exit\n");
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c
index 97a6d6c8..7ea5505f 100644
--- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c
+++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_exit.c
@@ -821,15 +821,6 @@ p9_sgpe_stop_exit()
             PK_TRACE("Set Jump Protect Enable");
             GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_DPLL_CTRL_OR, qloop), BIT64(1));
 
-            PK_TRACE("Poll on DPLL_STAT[update_complete]");
-
-            do
-            {
-                GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(EQ_QPPM_DPLL_STAT, qloop),
-                            scom_data.value);
-            }
-            while(!(scom_data.words.lower & BIT32(28)));
-
             // If VDM function is configured to be turned on,
             // then CME will enable VDM at CME boot regardless if pstate is enabled,
             // which needs DPLL control access as early as booting time,