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| author | Rahul Batra <rbatra@us.ibm.com> | 2018-09-26 14:28:54 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-10-03 10:49:48 -0500 |
| commit | a4a2740828ddd39bc55778372b9578121429aebc (patch) | |
| tree | 1264d86c2045ce932b09b27b89b09d59c5c85ce5 /import/chips | |
| parent | 8994383c50d7b3371ea1012d7a0586af4b473df3 (diff) | |
| download | talos-hcode-a4a2740828ddd39bc55778372b9578121429aebc.tar.gz talos-hcode-a4a2740828ddd39bc55778372b9578121429aebc.zip | |
PGPE: Use correct VPD Pts for VDD to Pstate intp.
Key_Cronus_Test=PM_REGRESS
Change-Id: Ie33bbeaed17b936845dcdc75874d149ca6693e37
CQ: SW446944
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66697
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c index d97e2f8e..0864fae8 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c @@ -179,7 +179,7 @@ uint8_t p9_pgpe_gppb_intp_ps_from_ext_vdd(uint16_t ext_vdd) //Do the math using shifted by 1. ps = -(((G_gppb->VPStateSlopes[VPD_PT_SET_BIASED_SYSP][r]) * (ext_vdd - G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][r].vdd_mv)) >> (VID_SLOPE_FP_SHIFT_12 - 1)) + - (G_gppb->operating_points_set[VPD_SLOPES_BIASED][r].pstate << 1) ; + (G_gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][r].pstate << 1) ; ps = ps >> 1;//Shift it back return ps; |
