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authorPrem Shanker Jha <premjha2@in.ibm.com>2018-07-17 02:28:32 -0500
committerhostboot <hostboot@us.ibm.com>2018-08-22 17:56:02 -0500
commit058ab063c16f195dfa157bc44deeaa1e5522d284 (patch)
treee357026d905bda906f9588e0ad5fe88fa58a9d74 /import/chips/p9/procedures/utils
parent299a9ff2499424800c0b1f27886ee68409a28914 (diff)
downloadtalos-hcode-058ab063c16f195dfa157bc44deeaa1e5522d284.tar.gz
talos-hcode-058ab063c16f195dfa157bc44deeaa1e5522d284.zip
SCOM Restore: Handle case of old HB and new STOP API case.
Commit addresses a situation where STOP API is new and HB is old. It detects the siutation and retains legacy behavior. This situation can arise if PHYP tries to use SCOM restore changes of STOP API with older fipsdriver or OPAL does the same on older HB binaries. Key_Cronus_Test=PM_REGRESS Change-Id: Iaaa866169904a47e10c79ae4894d2eedccfafe53 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62610 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/utils')
-rwxr-xr-ximport/chips/p9/procedures/utils/stopreg/p9_stop_api.C23
1 files changed, 21 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C b/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C
index 3da7a299..e855214f 100755
--- a/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C
+++ b/import/chips/p9/procedures/utils/stopreg/p9_stop_api.C
@@ -32,6 +32,8 @@
// *HWP Team : PM
// *HWP Level : 2
// *HWP Consumed by : HB:HYP
+
+// *INDENT-OFF*
#ifdef PPC_HYP
#include <HvPlicModule.H>
#endif
@@ -69,6 +71,8 @@ const StopSprReg_t g_sprRegister[] =
};
const uint32_t MAX_SPR_SUPPORTED = 10;
+const uint32_t LEGACY_CORE_SCOM_SUPPORTED = 15;
+const uint32_t LEGACY_QUAD_SCOM_SUPPORTED = 63;
//-----------------------------------------------------------------------------
@@ -835,12 +839,24 @@ StopReturnCode_t p9_stop_save_scom( void* const i_pImage,
l_maxScomRestoreEntry =
*(uint32_t*)((uint8_t*)i_pImage + CPMR_HOMER_OFFSET + CPMR_MAX_SCOM_REST_PER_CORE_BYTE);
pScomEntry = CORE_ID_SCOM_START(i_pImage, chipletId )
- cacheEntry = false;
+ cacheEntry = false;
+
+ if( !l_maxScomRestoreEntry )
+ {
+ //Old HB and new STOP API case. Retain legacy Number
+ l_maxScomRestoreEntry = SWIZZLE_4_BYTE(LEGACY_CORE_SCOM_SUPPORTED);
+ }
}
else
{
l_maxScomRestoreEntry =
*(uint32_t*)((uint8_t*)i_pImage + QPMR_HOMER_OFFSET + QPMR_QUAD_MAX_SCOM_ENTRY_BYTE);
+
+ if( !l_maxScomRestoreEntry )
+ {
+ // Incase of a bad HOMER header initialization, fall back on legacy number.
+ l_maxScomRestoreEntry = SWIZZLE_4_BYTE(LEGACY_QUAD_SCOM_SUPPORTED);
+ }
// chiplet is a cache. let us find start address of cache section
// associated with given chiplet. A cache section associated with
// given chiplet is split in to L2, L3 and EQ area.
@@ -891,13 +907,16 @@ StopReturnCode_t p9_stop_save_scom( void* const i_pImage,
break;
}
+
if(( imageVer > LEGACY_SCOM_RESTORE_VER ) && ( cacheEntry ) )
{
//STOP API migrated to newer algorithm for creation of entries
+
pScomEntry = CACHE_SCOM_ADDR(i_pImage,
chipletId,
l_maxScomRestoreEntry )
- entryLimit = l_maxScomRestoreEntry;
+
+ entryLimit = l_maxScomRestoreEntry;
}
if(( !pScomEntry ) || ( l_rc ) )
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