diff options
| author | Gregory S Still <stillgs@us.ibm.com> | 2020-01-23 11:14:23 -0600 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2020-02-01 01:01:42 -0600 |
| commit | 396561e656a954fc3a6cadaa8eaec9ebf2f687cf (patch) | |
| tree | 4d0e2f864fa4918a3743cedfa59645ceebf79a29 /import/chips/p9/procedures/ppe_closed | |
| parent | 4a5305fc443a0f3791290b3fad9dbbff4d8aae7a (diff) | |
| download | talos-hcode-396561e656a954fc3a6cadaa8eaec9ebf2f687cf.tar.gz talos-hcode-396561e656a954fc3a6cadaa8eaec9ebf2f687cf.zip | |
Revert "Hcode: hcode changes for STOP exit in SMF enabled HV mode"
This reverts commit ff590eff954571ee8f9a32d7daf67fbdb36ab97a.
Change-Id: I0a0b549a87a1cee4c554aa9b8cf8c6febd134cea
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90214
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: Gregory S Still <stillgs@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Gregory S Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c | 29 |
1 files changed, 13 insertions, 16 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c index aa11dc6a..ab305ff4 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c @@ -1162,8 +1162,6 @@ p9_cme_stop_self_execute(uint32_t core, uint32_t i_saveRestore ) { uint32_t core_mask; data64_t scom_data; - data64_t stop_exit_privilege; - stop_exit_privilege.value = 0; cmeHeader_t* pCmeImgHdr = (cmeHeader_t*)(CME_SRAM_HEADER_ADDR); scom_data.value = pCmeImgHdr->g_cme_cpmr_PhyAddr & BITS64(13, 30); //HRMOR[13:42] @@ -1256,8 +1254,11 @@ p9_cme_stop_self_execute(uint32_t core, uint32_t i_saveRestore ) PK_TRACE_INF("SMF core wakes up, write URMOR with HOMER address" ); scom_data.words.upper = scom_data.words.upper & ~BIT32(15); - scom_data.value = pCmeImgHdr->g_cme_unsec_cpmr_PhyAddr & BITS64(13, 30); //Unsecure HOMER - PKTRACE("SMF core self save, write un-secure HOMER address"); + if( SPR_SELF_SAVE == i_saveRestore ) + { + scom_data.value = pCmeImgHdr->g_cme_unsec_cpmr_PhyAddr & BITS64(13, 30); //Unsecure HOMER + PKTRACE("SMF core self save, write un-secure HOMER address"); + } CME_PUTSCOM(HRMOR, core, scom_data.value); @@ -1304,37 +1305,33 @@ p9_cme_stop_self_execute(uint32_t core, uint32_t i_saveRestore ) { //Writing thread scratch register to //Signal Self Save Restore code for save operation. - stop_exit_privilege.words.upper = 0; - stop_exit_privilege.words.lower = 1; + scom_data.words.upper = 0; + scom_data.words.lower = 1; } else { //Writing thread scratch register to // 1. Init Runtime wakeup mode for core. - // 2. HV Exit with SMF enable or Disable - // 3. Signal Self Save Restore code for restore operation. - + // 2. Signal Self Save Restore code for restore operation. if (scom_data.words.upper & BIT32(3)) { - stop_exit_privilege.value = BIT64(59); + scom_data.value = BIT64(59); } - - if (scom_data.words.upper & BIT32(4)) + else { - stop_exit_privilege.value |= BIT64(58); + scom_data.value = 0; } - } if( CME_MASK_C0 & core_mask ) { - CME_PUTSCOM(SCRATCH0, CME_MASK_C0, stop_exit_privilege.value); + CME_PUTSCOM(SCRATCH0, CME_MASK_C0, scom_data.value); } if( CME_MASK_C1 & core_mask ) { - CME_PUTSCOM(SCRATCH1, CME_MASK_C1, stop_exit_privilege.value); + CME_PUTSCOM(SCRATCH1, CME_MASK_C1, scom_data.value); } } } |

