diff options
author | Rahul Batra <rbatra@us.ibm.com> | 2017-08-09 16:55:08 -0500 |
---|---|---|
committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 18:49:29 -0500 |
commit | 62f3c1d8d9e7902554e41450e9ccc5d0f20c8ca5 (patch) | |
tree | de349f702dfbc9a51c79fda682343ae0433571b9 /import/chips/p9/procedures/ppe_closed/pgpe | |
parent | a501881e614c6240ef651a0c8bbadaded9bab420 (diff) | |
download | talos-hcode-62f3c1d8d9e7902554e41450e9ccc5d0f20c8ca5.tar.gz talos-hcode-62f3c1d8d9e7902554e41450e9ccc5d0f20c8ca5.zip |
PSTATE: PMSR Fix and Other Updates
-Added code to write Pmin/Pmax fields
-Fixed CME code, so quad manager correctly updates PMSR
-Fixed CME sibling notify bug
-Removed PGPE trace code to reduce space
Change-Id: Ic87476be703741a48990ab2c13441b7eba601f73
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44441
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/pgpe')
8 files changed, 170 insertions, 112 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gen_pstate_info.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gen_pstate_info.c index faf542c2..d15ee5b9 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gen_pstate_info.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gen_pstate_info.c @@ -46,8 +46,6 @@ void p9_pgpe_gen_occ_pstate_tbl(GeneratedPstateInfo* gpi); // void p9_pgpe_gen_pstate_info() { - PK_TRACE_DBG("> p9_pgpe_gen_pstate_info to memory 0x%X", - (uint32_t)G_pgpe_header_data->g_pgpe_gen_pstables_mem_offset); //int p; //Get GlobalPstateParmBlock offset from pgpe_header uint32_t* pstate_tbl_memory_offset = G_pgpe_header_data->g_pgpe_gen_pstables_mem_offset; @@ -86,7 +84,6 @@ void p9_pgpe_gen_pstate_info() //Generate Pstate table for OCC in SRAM p9_pgpe_gen_occ_pstate_tbl(&G_gpi); - PK_TRACE_DBG("< p9_pgpe_gen_pstate_info"); } // @@ -96,7 +93,6 @@ void p9_pgpe_gen_pstate_info() // void p9_pgpe_gen_raw_pstates(GlobalPstateParmBlock* gppb, GeneratedPstateInfo* gpi) { - PK_TRACE_DBG(">> p9_pgpe_gen_raw_pstates"); int32_t p; uint32_t freq_khz_offset = 0, highest_pstate; highest_pstate = gppb->operating_points_set[VPD_PT_SET_SYSP][POWERSAVE].pstate; @@ -126,7 +122,6 @@ void p9_pgpe_gen_raw_pstates(GlobalPstateParmBlock* gppb, GeneratedPstateInfo* g // void p9_pgpe_gen_biased_pstates(GlobalPstateParmBlock* gppb, GeneratedPstateInfo* gpi) { - PK_TRACE_DBG(">> p9_pgpe_gen_biased_pstates"); int32_t p; uint32_t freq_khz_offset = 0, highest_pstate; highest_pstate = gppb->operating_points_set[VPD_PT_SET_BIASED_SYSP][POWERSAVE].pstate; @@ -158,8 +153,6 @@ void p9_pgpe_gen_biased_pstates(GlobalPstateParmBlock* gppb, GeneratedPstateInfo // void p9_pgpe_gen_occ_pstate_tbl(GeneratedPstateInfo* gpi) { - PK_TRACE_DBG(">> p9_pgpe_gen_occ_pstate_tbl to SRAM 0x%X", - (uint32_t)G_pgpe_header_data->g_pgpe_occ_pstables_sram_addr); int p; OCCPstateTable_t* opst = (OCCPstateTable_t*)G_pgpe_header_data->g_pgpe_occ_pstables_sram_addr; opst->entries = (G_pgpe_header_data->g_pgpe_occ_pstables_len) / sizeof(OCCPstateTable_entry_t); diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c index abb27a08..1d5973d6 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c @@ -76,7 +76,7 @@ void p9_pgpe_ipc_init() // void p9_pgpe_ipc_405_start_stop(ipc_msg_t* cmd, void* arg) { - PK_TRACE_INF("START_STOP: Entry\n"); + PK_TRACE_INF("IPC: START_STOP"); ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)cmd; ipcmsg_start_stop_t* args = (ipcmsg_start_stop_t*)async_cmd->cmd_data; @@ -99,7 +99,6 @@ void p9_pgpe_ipc_405_start_stop(ipc_msg_t* cmd, void* arg) G_pgpe_pstate_record.alreadySemPosted = 1; } - PK_TRACE_INF("START_STOP: Exit\n"); } // @@ -109,7 +108,7 @@ void p9_pgpe_ipc_405_start_stop(ipc_msg_t* cmd, void* arg) // void p9_pgpe_ipc_405_clips(ipc_msg_t* cmd, void* arg) { - PK_TRACE_INF("405_CLIPS: Entry\n"); + PK_TRACE_INF("IPC: CLIP_UPDT"); ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)cmd; ipcmsg_set_pmcr_t* args = (ipcmsg_set_pmcr_t*)async_cmd->cmd_data; @@ -130,8 +129,6 @@ void p9_pgpe_ipc_405_clips(ipc_msg_t* cmd, void* arg) pk_semaphore_post(&G_pgpe_pstate_record.sem_process_req); G_pgpe_pstate_record.alreadySemPosted = 1; } - - PK_TRACE_INF("405_CLIPS: Exit\n"); } // @@ -141,7 +138,7 @@ void p9_pgpe_ipc_405_clips(ipc_msg_t* cmd, void* arg) // void p9_pgpe_ipc_405_set_pmcr(ipc_msg_t* cmd, void* arg) { - PK_TRACE_INF("405_SET_PMCR: Entry\n"); + PK_TRACE_INF("IPC: SET_PMCR"); ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)cmd; ipcmsg_set_pmcr_t* args = (ipcmsg_set_pmcr_t*)async_cmd->cmd_data; @@ -153,7 +150,7 @@ void p9_pgpe_ipc_405_set_pmcr(ipc_msg_t* cmd, void* arg) } else { - PK_TRACE_DBG("405_SET_PMCR: Duplicate\n"); + PK_TRACE_DBG("IPC: SET_PMCR Dup."); args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); } @@ -164,7 +161,6 @@ void p9_pgpe_ipc_405_set_pmcr(ipc_msg_t* cmd, void* arg) G_pgpe_pstate_record.alreadySemPosted = 1; } - PK_TRACE_INF("405_SET_PMCR: Exit\n"); } // @@ -174,7 +170,7 @@ void p9_pgpe_ipc_405_set_pmcr(ipc_msg_t* cmd, void* arg) // void p9_pgpe_ipc_405_wof_control(ipc_msg_t* cmd, void* arg) { - PK_TRACE_INF("405_WOF_CTRL: Entry\n"); + PK_TRACE_INF("IPC: WOF_CTRL"); ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)cmd; ipcmsg_wof_control_t* args = (ipcmsg_wof_control_t*)async_cmd->cmd_data; @@ -195,8 +191,6 @@ void p9_pgpe_ipc_405_wof_control(ipc_msg_t* cmd, void* arg) pk_semaphore_post(&G_pgpe_pstate_record.sem_process_req); G_pgpe_pstate_record.alreadySemPosted = 1; } - - PK_TRACE_INF("405_WOF_CTRL: Exit\n"); } // @@ -206,7 +200,7 @@ void p9_pgpe_ipc_405_wof_control(ipc_msg_t* cmd, void* arg) // void p9_pgpe_ipc_405_wof_vfrt(ipc_msg_t* cmd, void* arg) { - PK_TRACE_INF("405_WOF_VFRT: Entry\n"); + PK_TRACE_INF("IPC:_WOF_VFRT"); ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)cmd; ipcmsg_wof_vfrt_t* args = (ipcmsg_wof_vfrt_t*)async_cmd->cmd_data; @@ -227,8 +221,6 @@ void p9_pgpe_ipc_405_wof_vfrt(ipc_msg_t* cmd, void* arg) pk_semaphore_post(&G_pgpe_pstate_record.sem_process_req); G_pgpe_pstate_record.alreadySemPosted = 1; } - - PK_TRACE_INF("405_WOF_VFRT: Exit\n"); } // @@ -238,7 +230,7 @@ void p9_pgpe_ipc_405_wof_vfrt(ipc_msg_t* cmd, void* arg) // void p9_pgpe_ipc_sgpe_updt_active_cores(ipc_msg_t* cmd, void* arg) { - PK_TRACE_INF("SGPE_UPDT_CORES: Entry\n"); + PK_TRACE_INF("IPC: UPDT_CORES"); if (G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack == 0 && G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_processing == 0) @@ -262,7 +254,6 @@ void p9_pgpe_ipc_sgpe_updt_active_cores(ipc_msg_t* cmd, void* arg) G_pgpe_pstate_record.alreadySemPosted = 1; } - PK_TRACE_INF("SGPE_UPDT_CORES: Exit\n"); } // @@ -272,7 +263,7 @@ void p9_pgpe_ipc_sgpe_updt_active_cores(ipc_msg_t* cmd, void* arg) // void p9_pgpe_ipc_sgpe_updt_active_quads(ipc_msg_t* cmd, void* arg) { - PK_TRACE_INF("SGPE_UPDT_QUADS: Entry\n"); + PK_TRACE_INF("IPC: UPDT_QUADS"); if (G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack == 0 && G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_processing == 0 && @@ -291,13 +282,7 @@ void p9_pgpe_ipc_sgpe_updt_active_quads(ipc_msg_t* cmd, void* arg) (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; args->fields.return_code = IPC_SGPE_PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); - PK_TRACE_INF("SGPE_UPDT_QUADS: %d %d\n", - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_processing, - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack); - PK_TRACE_INF("SGPE_UPDT_CORES: %d %d\n", - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_processing, - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack); - PK_TRACE_INF("SGPE_UPDT_QUADS: Acked\n"); + PK_TRACE_INF("IPC: UPDT_QUADS While Pending"); } if (G_pgpe_pstate_record.alreadySemPosted == 0) @@ -306,5 +291,4 @@ void p9_pgpe_ipc_sgpe_updt_active_quads(ipc_msg_t* cmd, void* arg) G_pgpe_pstate_record.alreadySemPosted = 1; } - PK_TRACE_INF("SGPE_UPDT_QUADS: Exit\n"); } diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c index 0c34dd28..1f2d929e 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c @@ -87,7 +87,6 @@ void p9_pgpe_irq_handler_occ_error(void* arg, PkIrqId irq) else { PK_TRACE_ERR("OCC Error: Unexpected OCC_FIR[0x%08x%08x] \n", UPPER32(fir.value), LOWER32(fir.value)); - pk_halt(); } pk_irq_vec_restore(&ctx); @@ -254,6 +253,12 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq) GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 0), value); value |= ((uint64_t)(MAX_QUADS - 1 - q) << 3) << 32; GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 0), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_OR, q, 0), BIT64(2)); + value = ((uint64_t)G_pgpe_pstate_record.psClipMax[q] << SHIFT64(23)) | ((uint64_t)G_pgpe_pstate_record.psClipMin[q] << + SHIFT64(31)); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS0, q, 0), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS1, q, 0), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_CLR, q, 0), BIT64(2)); } if (qcsr.fields.ex_config & (0x400 >> (q << 1))) @@ -261,6 +266,12 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq) GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 1), value); value |= ((uint64_t)(MAX_QUADS - 1 - q) << 3) << 32; GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 1), value); + value = ((uint64_t)G_pgpe_pstate_record.psClipMax[q] << SHIFT64(23)) | ((uint64_t)G_pgpe_pstate_record.psClipMin[q] << + SHIFT64(31)); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_OR, q, 1), BIT64(2)); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS0, q, 1), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS1, q, 1), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_CLR, q, 1), BIT64(2)); } //Give Quad Manager CME control of DPLL through inter-ppm diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c index 7906e567..0f324be8 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c @@ -240,12 +240,6 @@ main(int argc, char** argv) PK_TRACE_DBG("Start PK Threads"); - uint64_t data; - GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(QPPM_DPLL_CTRL, 3), data); - PK_TRACE_DBG("Got Data=0x%08x%08x", data >> 32, data); - GPE_GETSCOM(GPE_SCOM_ADDR_QUAD(QPPM_DPLL_FREQ, 3), data); - PK_TRACE_DBG("Got Data=0x%08x%08x", data >> 32, data); - //GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(QPPM_DPLL_FREQ, 3),data); // Start running the highest priority thread. // This function never returns pk_start_threads(); diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c index f20d1f8c..bd8a3fbb 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c @@ -112,6 +112,8 @@ void p9_pgpe_pstate_init() G_pgpe_pstate_record.numActiveCores = 0; G_pgpe_pstate_record.vratio = 0; //This will be filled up when WOF is enabled G_pgpe_pstate_record.fratio = 0; //This will be filled up when WOF is enabled + G_pgpe_pstate_record.pendingPminClipBcast = 0; + G_pgpe_pstate_record.pendingPmaxClipBcast = 0; PK_TRACE_INF("SafePstate=0x%x", G_pgpe_pstate_record.safePstate); } @@ -1044,7 +1046,7 @@ void p9_pgpe_pstate_start(uint32_t pstate_start_origin) ocb_qcsr_t qcsr; uint8_t quadPstates[MAX_QUADS]; uint32_t lowestDpll, syncPstate, q; - uint64_t value; + uint64_t value, pmin, pmax; qcsr.value = in32(OCB_QCSR); @@ -1124,26 +1126,6 @@ void p9_pgpe_pstate_start(uint32_t pstate_start_origin) p9_pgpe_pstate_dpll_write(0xfc, dpllFreq.value); } - //4. Determine PMCR Owner - if (pstate_start_origin == PSTATE_START_OCC_IPC) - { - PK_TRACE_DBG("g_oimr_override:0x%llx", g_oimr_override); - ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd; - ipcmsg_start_stop_t* args = (ipcmsg_start_stop_t*)async_cmd->cmd_data; - p9_pgpe_pstate_set_pmcr_owner(args->pmcr_owner); - } - else - { - //Bring up the PGPE in Characterizaion Mode by default. This mimics - //first starting pstates with OCC as owner which enables SCOM writes - //to PMCR, and then switching the owner to CHAR which enables PCB_TYPE1 interrupts - //and allows CME to forward Pstate Requests - p9_pgpe_pstate_set_pmcr_owner(PMCR_OWNER_OCC); - PK_TRACE_DBG("OWNER_CHAR"); - G_pgpe_pstate_record.pmcrOwner = PMCR_OWNER_CHAR; - g_oimr_override &= ~(BIT64(46)); - out32(OCB_OIMR1_CLR, BIT32(14)); //Enable PCB_INTR_TYPE1 - } //4. Init PStates Data and Send Pstate Start DB0 to active CMEs for (q = 0; q < MAX_QUADS; q++) @@ -1160,20 +1142,28 @@ void p9_pgpe_pstate_start(uint32_t pstate_start_origin) p9_pgpe_pstate_update(quadPstates); - //Set up CME_SCRATCH0[Local_Pstate_Index] + //5. Set up CME_SCRATCH0[Local_Pstate_Index] for (q = 0; q < MAX_QUADS; q++) { if(G_pgpe_pstate_record.activeQuads & (0x80 >> q)) { //Give Quad Manager CME control of DPLL through inter-ppm GPE_PUTSCOM(GPE_SCOM_ADDR_QUAD(QPPM_QPMMR_OR, q), BIT64(26)); + pmin = G_pgpe_pstate_record.psClipMax[q]; + pmax = G_pgpe_pstate_record.psClipMin[q]; if (qcsr.fields.ex_config & (0x800 >> (q << 1))) { GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 0), value); value |= (uint64_t)((MAX_QUADS - 1 - q) << 3) << 32; GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 0), value); - PK_TRACE_DBG("SRTCH0[%d_1]:0x%08x%08x", q, value >> 32, value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_OR, q, 0), BIT64(2)); + value = 0; + value |= (pmin << SHIFT64(23)); + value |= (pmax << SHIFT64(31)); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS0, q, 0), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS1, q, 0), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_CLR, q, 0), BIT64(2)); } if (qcsr.fields.ex_config & (0x400 >> (q << 1))) @@ -1181,11 +1171,38 @@ void p9_pgpe_pstate_start(uint32_t pstate_start_origin) GPE_GETSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 1), value); value |= (uint64_t)((MAX_QUADS - 1 - q) << 3) << 32; GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_SRTCH0, q, 1), value); - PK_TRACE_DBG("SRTCH0[%d_1]:0x%08x%08x", q, value >> 32, value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_OR, q, 1), BIT64(2)); + value = 0; + value |= (pmin << SHIFT64(23)); + value |= (pmax << SHIFT64(31)); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS0, q, 1), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_PMSRS1, q, 1), value); + GPE_PUTSCOM(GPE_SCOM_ADDR_CME(CME_SCOM_LMCR_CLR, q, 1), BIT64(2)); } } } + //6. Determine PMCR Owner + if (pstate_start_origin == PSTATE_START_OCC_IPC) + { + ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd; + ipcmsg_start_stop_t* args = (ipcmsg_start_stop_t*)async_cmd->cmd_data; + p9_pgpe_pstate_set_pmcr_owner(args->pmcr_owner); + } + else + { + //Bring up the PGPE in Characterizaion Mode by default. This mimics + //first starting pstates with OCC as owner which enables SCOM writes + //to PMCR, and then switching the owner to CHAR which enables PCB_TYPE1 interrupts + //and allows CME to forward Pstate Requests + p9_pgpe_pstate_set_pmcr_owner(PMCR_OWNER_OCC); + PK_TRACE_DBG("OWNER_CHAR"); + G_pgpe_pstate_record.pmcrOwner = PMCR_OWNER_CHAR; + g_oimr_override &= ~(BIT64(46)); + out32(OCB_OIMR1_CLR, BIT32(14)); //Enable PCB_INTR_TYPE1 + } + + //7. Send Pstate Start Doorbell0 pgpe_db0_start_ps_bcast_t db0; db0.value = 0; db0.fields.msg_id = MSGID_DB0_START_PSTATE_BROADCAST; @@ -1263,6 +1280,40 @@ void p9_pgpe_pstate_stop() PK_TRACE_DBG("Stop Done"); } +void p9_pgpe_pstate_clip_bcast(uint32_t clip_bcast_type) +{ + PK_TRACE_DBG("Clip Bcast"); + pgpe_db0_clip_bcast_t db0; + db0.value = 0; + db0.fields.msg_id = MSGID_DB0_CLIP_BROADCAST; + db0.fields.clip_type = clip_bcast_type; + + //Note that we store PMIN as psClipMax(which lower Pstate, but higher numbered Pstate) + if (clip_bcast_type == DB0_CLIP_BCAST_TYPE_PMIN) + { + db0.fields.quad0_clip = G_pgpe_pstate_record.psClipMax[0]; + db0.fields.quad1_clip = G_pgpe_pstate_record.psClipMax[1]; + db0.fields.quad2_clip = G_pgpe_pstate_record.psClipMax[2]; + db0.fields.quad3_clip = G_pgpe_pstate_record.psClipMax[3]; + db0.fields.quad4_clip = G_pgpe_pstate_record.psClipMax[4]; + db0.fields.quad5_clip = G_pgpe_pstate_record.psClipMax[5]; + } + else if (clip_bcast_type == DB0_CLIP_BCAST_TYPE_PMAX) + { + db0.fields.quad0_clip = G_pgpe_pstate_record.psClipMin[0]; + db0.fields.quad1_clip = G_pgpe_pstate_record.psClipMin[1]; + db0.fields.quad2_clip = G_pgpe_pstate_record.psClipMin[2]; + db0.fields.quad3_clip = G_pgpe_pstate_record.psClipMin[3]; + db0.fields.quad4_clip = G_pgpe_pstate_record.psClipMin[4]; + db0.fields.quad5_clip = G_pgpe_pstate_record.psClipMin[5]; + } + + p9_pgpe_send_db0(db0.value, + G_pgpe_pstate_record.activeQuads, + G_pgpe_pstate_record.activeCores, + PGPE_DB0_UNICAST); +} + void p9_pgpe_pstate_setup_process_pcb_type4() { ocb_ccsr_t ccsr; diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h index 8b2ad365..792090a0 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.h @@ -119,6 +119,7 @@ typedef struct uint32_t numActiveCores, numConfCores; uint16_t vratio, fratio; uint16_t vindex, findex; + uint32_t pendingPminClipBcast, pendingPmaxClipBcast; } PgpePstateRecord __attribute__ ((aligned (8))); @@ -148,6 +149,7 @@ void p9_pgpe_pstate_process_quad_entry_done(uint32_t quadsAffected); void p9_pgpe_pstate_process_quad_exit(uint32_t quadsAffected); void p9_pgpe_pstate_start(uint32_t pstate_start_origin); void p9_pgpe_pstate_stop(); +void p9_pgpe_pstate_clip_bcast(uint32_t clip_type); void p9_pgpe_pstate_setup_process_pcb_type4(); void p9_pgpe_pstate_updt_actual_quad(uint32_t q); #endif // diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c index 00e90754..9ed553a9 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c @@ -166,6 +166,23 @@ void p9_pgpe_thread_actuate_pstates(void* arg) { if (G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].pending_ack == 1) { + pk_irq_sub_critical_enter(&ctx); + + //Notify CMEs about Updated Pmin and Pmax + if (G_pgpe_pstate_record.pendingPminClipBcast) + { + p9_pgpe_pstate_clip_bcast(DB0_CLIP_BCAST_TYPE_PMIN); + G_pgpe_pstate_record.pendingPminClipBcast = 0; + } + + if (G_pgpe_pstate_record.pendingPmaxClipBcast) + { + p9_pgpe_pstate_clip_bcast(DB0_CLIP_BCAST_TYPE_PMAX); + G_pgpe_pstate_record.pendingPmaxClipBcast = 0; + } + + pk_irq_sub_critical_exit(&ctx); + ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].cmd; ipcmsg_clip_update_t* args = (ipcmsg_clip_update_t*)async_cmd->cmd_data; args->msg_cb.rc = PGPE_RC_SUCCESS; diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c index ed453445..ef90cc45 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c @@ -55,7 +55,7 @@ void p9_pgpe_process_set_pmcr_req(); // void p9_pgpe_thread_process_requests(void* arg) { - PK_TRACE_DBG("PROCTH:Started\n"); + PK_TRACE_DBG("PROCTH:Started"); uint32_t restore_irq; PkMachineContext ctx; @@ -70,7 +70,7 @@ void p9_pgpe_thread_process_requests(void* arg) asm volatile ("tw 0, 31, 0"); #endif - PK_TRACE_INF("PROCTH:Inited; PGPE_ACTIVE set\n"); + PK_TRACE_INF("PROCTH:Inited"); while(1) { @@ -79,15 +79,12 @@ void p9_pgpe_thread_process_requests(void* arg) wrteei(1); //Enter Sub-Critical Section. Timer Interrupts are enabled - /*pk_critical_section_enter(&ctx); - pk_irq_save_and_set_mask(0); - pk_critical_section_exit(&ctx);*/ pk_irq_sub_critical_enter(&ctx); G_pgpe_pstate_record.alreadySemPosted = 0; restore_irq = 1; - PK_TRACE_DBG("PROCTH: Process Task\n"); + PK_TRACE_DBG("PROCTH: Process Task"); //Go through IPC Pending Table if (G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_processing == 1) @@ -157,7 +154,7 @@ void p9_pgpe_thread_process_requests(void* arg) //eventually restore IPC interrupt if (restore_irq == 1) { - PK_TRACE_DBG("PROCTH: IRQ Restore\n"); + PK_TRACE_DBG("PROCTH: IRQ Restore"); pk_irq_vec_restore(&ctx); } } @@ -168,7 +165,7 @@ void p9_pgpe_thread_process_requests(void* arg) // void p9_pgpe_process_sgpe_updt_active_cores() { - PK_TRACE_DBG("PROCTH: Core Updt Entry\n"); + PK_TRACE_DBG("PROCTH: Core Updt Entry"); uint32_t c; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd; @@ -177,7 +174,7 @@ void p9_pgpe_process_sgpe_updt_active_cores() //If in PM_SUSPENDED state, then ack back with error if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED) { - PK_TRACE_DBG("PROCTH: PM Suspended\n"); + PK_TRACE_DBG("PROCTH: PM Suspended"); args->fields.return_code = IPC_SGPE_PGPE_RC_PM_COMPLEX_SUSPEND; G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS); @@ -188,7 +185,7 @@ void p9_pgpe_process_sgpe_updt_active_cores() if(G_pgpe_pstate_record.wofEnabled == 0) { - PK_TRACE_DBG("PROCTH: C Updt(WOF_Disabled)\n"); + PK_TRACE_DBG("PROCTH: C Updt(WOF_Disabled)"); args->fields.return_code = PGPE_WOF_RC_NOT_ENABLED; G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS); @@ -221,16 +218,16 @@ void p9_pgpe_process_sgpe_updt_active_cores() //Otherwise, wait to ACK until WOF Clip has been applied(from actuate_pstate thread) if (args->fields.update_type == UPDATE_ACTIVE_CORES_TYPE_ENTRY) { - PK_TRACE_DBG("PROCTH: Core Entry ACK back to SGPE\n"); + PK_TRACE_DBG("PROCTH: Core Entry ACK back to SGPE"); args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS); - PK_TRACE_DBG("PROCTH: Core Updt ENTRY ACKed\n"); + PK_TRACE_DBG("PROCTH: Core Updt ENTRY ACKed"); } } } - PK_TRACE_DBG("PROCTH: Core Updt Exit\n"); + PK_TRACE_DBG("PROCTH: Core Updt Exit"); } // @@ -238,7 +235,7 @@ void p9_pgpe_process_sgpe_updt_active_cores() // void p9_pgpe_process_sgpe_updt_active_quads() { - PK_TRACE_DBG("PROCTH: Quad Updt Start\n"); + PK_TRACE_DBG("PROCTH: Quad Updt Start"); ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; @@ -285,18 +282,18 @@ void p9_pgpe_process_sgpe_updt_active_quads() } } - PK_TRACE_DBG("PROCTH: Quad Updt End\n"); + PK_TRACE_DBG("PROCTH: Quad Updt End"); } void p9_pgpe_process_start_stop() { - PK_TRACE_DBG("PROCTH: Start/Stop Entry\n"); + PK_TRACE_DBG("PROCTH: Start/Stop Entry"); ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd; ipcmsg_start_stop_t* args = (ipcmsg_start_stop_t*)async_cmd->cmd_data; if(G_pgpe_header_data->g_pgpe_qm_flags & OCC_IPC_IMMEDIATE_RESP) { - PK_TRACE_DBG("START_STOP: Imm\n"); + PK_TRACE_DBG("START_STOP: Imm"); args->msg_cb.rc = PGPE_RC_SUCCESS; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; @@ -306,7 +303,7 @@ void p9_pgpe_process_start_stop() G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_SAFE_MODE) { - PK_TRACE_DBG("START_STOP: PM_SUSP/Safe\n"); + PK_TRACE_DBG("START_STOP: PM_SUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; @@ -324,7 +321,7 @@ void p9_pgpe_process_start_stop() } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_ACTIVE) { - PK_TRACE_DBG("START_STOP: PMCR OWNER Change to %d \n", args->pmcr_owner); + PK_TRACE_DBG("START_STOP: PMCR OWNER Change to %d ", args->pmcr_owner); p9_pgpe_pstate_set_pmcr_owner(args->pmcr_owner); args->msg_cb.rc = PGPE_RC_SUCCESS; G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; @@ -337,7 +334,7 @@ void p9_pgpe_process_start_stop() if(G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT || G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED) { - PK_TRACE_DBG("START_STOP: Already Stopped\n"); + PK_TRACE_DBG("START_STOP: Already Stopped"); args->msg_cb.rc = PGPE_RC_REQ_PSTATE_ALREADY_STOPPED; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; @@ -356,7 +353,7 @@ void p9_pgpe_process_start_stop() } } - PK_TRACE_DBG("PROCTH: Start/Stop End\n"); + PK_TRACE_DBG("PROCTH: Start/Stop End"); } @@ -365,7 +362,7 @@ void p9_pgpe_process_start_stop() // void p9_pgpe_process_clip_updt() { - PK_TRACE_DBG("PROCTH: Clip Updt Entry\n"); + PK_TRACE_DBG("PROCTH: Clip Updt Entry"); uint32_t q, ack = 0; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].cmd; @@ -375,7 +372,7 @@ void p9_pgpe_process_clip_updt() if(G_pgpe_header_data->g_pgpe_qm_flags & OCC_IPC_IMMEDIATE_RESP) { - PK_TRACE_DBG("PROCTH: Clip Updt Imme\n"); + PK_TRACE_DBG("PROCTH: Clip Updt Imme"); args->msg_cb.rc = PGPE_RC_SUCCESS; ack = 1; } @@ -383,7 +380,7 @@ void p9_pgpe_process_clip_updt() G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || G_pgpe_pstate_record.pstatesStatus == PSTATE_SAFE_MODE) { - PK_TRACE_DBG("PROCTH: Clip Updt PMSUSP/Safe\n"); + PK_TRACE_DBG("PROCTH: Clip Updt PMSUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; ack = 1; } @@ -394,8 +391,17 @@ void p9_pgpe_process_clip_updt() //Hcode stores them with reverse interpretation. for (q = 0; q < MAX_QUADS; q++) { - G_pgpe_pstate_record.psClipMax[q] = args->ps_val_clip_min[q]; - G_pgpe_pstate_record.psClipMin[q] = args->ps_val_clip_max[q]; + if (G_pgpe_pstate_record.psClipMax[q] != args->ps_val_clip_min[q]) + { + G_pgpe_pstate_record.psClipMax[q] = args->ps_val_clip_min[q]; + G_pgpe_pstate_record.pendingPminClipBcast = 1; + } + + if (G_pgpe_pstate_record.psClipMin[q] != args->ps_val_clip_max[q]) + { + G_pgpe_pstate_record.psClipMin[q] = args->ps_val_clip_max[q]; + G_pgpe_pstate_record.pendingPmaxClipBcast = 1; + } } p9_pgpe_pstate_apply_clips(&G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT]); @@ -414,7 +420,7 @@ void p9_pgpe_process_clip_updt() ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].cmd, IPC_RC_SUCCESS); } - PK_TRACE_DBG("PROCTH: Clip Upd Exit\n"); + PK_TRACE_DBG("PROCTH: Clip Upd Exit"); } // @@ -422,7 +428,7 @@ void p9_pgpe_process_clip_updt() // void p9_pgpe_process_wof_ctrl() { - PK_TRACE_DBG("PROCTH: WOF Ctrl Enter\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl Enter"); uint32_t ack_now = 1; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].cmd; @@ -433,19 +439,19 @@ void p9_pgpe_process_wof_ctrl() if((G_pgpe_header_data->g_pgpe_qm_flags & OCC_IPC_IMMEDIATE_RESP) || (G_pgpe_header_data->g_pgpe_qm_flags & WOF_IPC_IMMEDIATE_RESP)) { - PK_TRACE_DBG("PROCTH: WOF Ctrl Imme\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl Imme"); args->msg_cb.rc = PGPE_RC_SUCCESS; } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || G_pgpe_pstate_record.pstatesStatus == PSTATE_SAFE_MODE) { - PK_TRACE_DBG("PROCTH: WOF Ctrl PMSUSP/Safe\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl PMSUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; } else if(G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT || G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED) { - PK_TRACE_DBG("PROCTH: WOF Ctrl PSStop/Init\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl PSStop/Init"); args->msg_cb.rc = PGPE_RC_PSTATES_NOT_STARTED; } else @@ -456,7 +462,7 @@ void p9_pgpe_process_wof_ctrl() { if(G_pgpe_pstate_record.wofEnabled == 0) { - PK_TRACE_DBG("PROCTH: WOF Ctrl=ON,WOF_Enabled=0\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl=ON,WOF_Enabled=0"); if ((G_pgpe_header_data->g_pgpe_qm_flags & PGPE_HEADER_FLAGS_ENABLE_VRATIO) || (G_pgpe_header_data->g_pgpe_qm_flags & PGPE_HEADER_FLAGS_VRATIO_MODIFIER)) @@ -507,14 +513,14 @@ void p9_pgpe_process_wof_ctrl() else { args->msg_cb.rc = PGPE_RC_WOF_ALREADY_ON; - PK_TRACE_DBG("PROCTH: WOF Ctrl=ON,WOF_Enabled=1\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl=ON,WOF_Enabled=1"); } } else if (args->action == PGPE_ACTION_WOF_OFF) { if(G_pgpe_pstate_record.wofEnabled == 1) { - PK_TRACE_DBG("PROCTH: WOF Ctrl=OFF,WOF_Enabled=1\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl=OFF,WOF_Enabled=1"); if ((G_pgpe_header_data->g_pgpe_qm_flags & PGPE_HEADER_FLAGS_ENABLE_VRATIO) || (G_pgpe_header_data->g_pgpe_qm_flags & PGPE_HEADER_FLAGS_VRATIO_MODIFIER)) @@ -563,7 +569,7 @@ void p9_pgpe_process_wof_ctrl() else { args->msg_cb.rc = PGPE_RC_WOF_ALREADY_OFF; - PK_TRACE_DBG("PROCTH: WOF Ctrl=OFF,WOF_Enabled=0\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl=OFF,WOF_Enabled=0"); } } } @@ -575,7 +581,7 @@ void p9_pgpe_process_wof_ctrl() } - PK_TRACE_DBG("PROCTH: WOF Ctrl Exit\n"); + PK_TRACE_DBG("PROCTH: WOF Ctrl Exit"); } // @@ -583,7 +589,7 @@ void p9_pgpe_process_wof_ctrl() // void p9_pgpe_process_wof_vfrt() { - PK_TRACE_DBG("PROCTH: WOF VFRT Enter\n"); + PK_TRACE_DBG("PROCTH: WOF VFRT Enter"); uint32_t ack_now = 1; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_VFRT].cmd; @@ -594,19 +600,19 @@ void p9_pgpe_process_wof_vfrt() if((G_pgpe_header_data->g_pgpe_qm_flags & OCC_IPC_IMMEDIATE_RESP) || (G_pgpe_header_data->g_pgpe_qm_flags & WOF_IPC_IMMEDIATE_RESP)) { - PK_TRACE_DBG("PROCTH: WOF VFRT Imme\n"); + PK_TRACE_DBG("PROCTH: WOF VFRT Imme"); args->msg_cb.rc = PGPE_RC_SUCCESS; } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || G_pgpe_pstate_record.pstatesStatus == PSTATE_SAFE_MODE) { - PK_TRACE_DBG("PROCTH: WOF VFRT PMSUSP/Safe\n"); + PK_TRACE_DBG("PROCTH: WOF VFRT PMSUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; } else if(G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED || G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT) { - PK_TRACE_DBG("PROCTH: WOF VFRT PSStop/Init\n"); + PK_TRACE_DBG("PROCTH: WOF VFRT PSStop/Init"); args->msg_cb.rc = PGPE_RC_PSTATES_NOT_STARTED; } else @@ -642,7 +648,7 @@ void p9_pgpe_process_wof_vfrt() ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_VFRT].cmd, IPC_RC_SUCCESS); } - PK_TRACE_DBG("PROCTH: WOF VFRT Exit\n"); + PK_TRACE_DBG("PROCTH: WOF VFRT Exit"); } // @@ -650,7 +656,7 @@ void p9_pgpe_process_wof_vfrt() // void p9_pgpe_process_set_pmcr_req() { - PK_TRACE_DBG("PROCTH: Set PMCR Enter\n"); + PK_TRACE_DBG("PROCTH: Set PMCR Enter"); uint32_t q, c; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SET_PMCR_REQ].cmd; @@ -660,29 +666,29 @@ void p9_pgpe_process_set_pmcr_req() if(G_pgpe_header_data->g_pgpe_qm_flags & OCC_IPC_IMMEDIATE_RESP) { - PK_TRACE_DBG("PROCTH: Set PMCR Imme\n"); + PK_TRACE_DBG("PROCTH: Set PMCR Imme"); args->msg_cb.rc = PGPE_RC_SUCCESS; } else if(G_pgpe_pstate_record.pmcrOwner != PMCR_OWNER_OCC) { - PK_TRACE_DBG("PROCTH: !OCC_PMCR_OWNER\n"); + PK_TRACE_DBG("PROCTH: !OCC_PMCR_OWNER"); args->msg_cb.rc = PGPE_RC_OCC_NOT_PMCR_OWNER; } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT || G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED) { - PK_TRACE_DBG("PROCTH: Pstates !Started\n"); + PK_TRACE_DBG("PROCTH: Pstates !Started"); args->msg_cb.rc = PGPE_RC_PSTATES_NOT_STARTED; } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || G_pgpe_pstate_record.pstatesStatus == PSTATE_SAFE_MODE) { - PK_TRACE_DBG("PROCTH: Clip Updt PMSUSP/Safe\n"); + PK_TRACE_DBG("PROCTH: Clip Updt PMSUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; } else { - PK_TRACE_DBG("PROCTH: Upd coresPSReq\n"); + PK_TRACE_DBG("PROCTH: Upd coresPSReq"); for (q = 0; q < MAX_QUADS; q++) { @@ -691,7 +697,7 @@ void p9_pgpe_process_set_pmcr_req() G_pgpe_pstate_record.coresPSRequest[c] = (args->pmcr[q] >> 48) & 0x00FF; } - PK_TRACE_DBG("PROCTH: coresPSReq: 0x%x\n", G_pgpe_pstate_record.coresPSRequest[q * CORES_PER_QUAD]); + PK_TRACE_DBG("PROCTH: coresPSReq: 0x%x", G_pgpe_pstate_record.coresPSRequest[q * CORES_PER_QUAD]); } p9_pgpe_pstate_do_auction(); @@ -704,5 +710,5 @@ void p9_pgpe_process_set_pmcr_req() G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SET_PMCR_REQ].pending_ack = 0; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SET_PMCR_REQ].cmd, IPC_RC_SUCCESS); - PK_TRACE_DBG("PROCTH: Set PMCR Exit\n"); + PK_TRACE_DBG("PROCTH: Set PMCR Exit"); } |