PGPE Trace

Change-Id: Ia2eb727aedada87f1c840f570aa5e6b2b7b81e4a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44129
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>

10 files changed, 329 insertions, 15 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c
index c7cdda6a..04bb496d 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c
@@ -28,11 +28,13 @@
 #include "p9_pgpe_gppb.h"
 #include "p9_pgpe_header.h"
 #include <p9_hcd_memmap_occ_sram.H>
+#include "p9_pgpe_optrace.h"
 
 #define THROTTLE_SCOM_MULTICAST_READ_OR   0x41010A9E
 #define THROTTLE_SCOM_MULTICAST_READ_AND  0x49010A9E
 #define THROTTLE_SCOM_MULTICAST_WRITE     0x69010A9E
 #define AUX_TASK 14
+#define GPE2TSEL 0xC0020000
 
 uint32_t G_orig_throttle; //original value of throttle SCOM before manipulation
 uint32_t G_throttleOn;    //is throttling currently enabled
@@ -44,9 +46,13 @@ uint32_t G_beacon_count;
 uint32_t G_aux_task_count_threshold;
 uint32_t G_aux_task_count;
 
+uint32_t G_tb_sync_count_threshold;
+uint32_t G_tb_sync_count;
+
 extern GlobalPstateParmBlock* G_gppb;
 extern PgpeHeader_t* G_pgpe_header_data;
 extern PgpePstateRecord G_pgpe_pstate_record;
+extern TraceData_t G_pgpe_optrace_data;
 
 void (*p9_pgpe_auxiliary_task)() = (void*)OCC_SRAM_AUX_TASK_ADDR;
 
@@ -84,10 +90,17 @@ void p9_pgpe_fit_init()
     }
 
     PK_TRACE_DBG("Fit AuxTaskThr=0x%d", G_aux_task_count_threshold);
-
+#if NIMBUS_DD_LEVEL != 10
+    uint32_t tsel = ((in32(GPE2TSEL) >> 24) & 0xF);
+#else
+    uint32_t tsel = 0xA;
+#endif
+    G_tb_sync_count_threshold = ((0x2 << tsel) - 1);
+    PK_TRACE_DBG("Fit TimebaseSyncThr=0x%d", G_tb_sync_count_threshold);
     G_throttleOn = 0;
     G_throttleCount = 0;
     G_beacon_count = 0;
+    G_tb_sync_count = 0;
     ppe42_fit_setup(p9_pgpe_fit_handler, NULL);
 }
 
@@ -204,6 +217,10 @@ __attribute__((always_inline)) inline void handle_occ_beacon()
                         && (G_pgpe_pstate_record.pstatesStatus != PSTATE_STOPPED))
                 {
                     p9_pgpe_pstate_stop();
+                    G_pgpe_optrace_data.word[0] = (START_STOP_FLAG << 24) | (G_pgpe_pstate_record.globalPSComputed << 16) | (in32(
+                                                      OCB_QCSR) >> 16);
+                    p9_pgpe_optrace(PRC_START_STOP);
+
                 }
             }
         }
@@ -240,6 +257,22 @@ __attribute__((always_inline)) inline void handle_aux_task()
     }
 }
 
+//FIT Timebase Sync is called every time bottom 3B of OTBR
+//roll over so it's clear in tracing how much time has passed
+__attribute__((always_inline)) inline void handle_fit_timebase_sync()
+{
+    if (G_tb_sync_count == G_tb_sync_count_threshold)
+    {
+        G_pgpe_optrace_data.word[0] = *(G_pgpe_header_data->g_pgpe_beacon_addr);
+        p9_pgpe_optrace(FIT_TB_SYNC);
+        G_tb_sync_count = 0;
+    }
+    else
+    {
+        G_tb_sync_count++;
+    }
+}
+
 //p9_pgpe_fit_handler
 //
 //This is a periodic FIT Handler whose period is determined
@@ -250,4 +283,5 @@ void p9_pgpe_fit_handler(void* arg, PkIrqId irq)
     handle_occ_beacon();
     handle_core_throttle();
     handle_aux_task();
+    handle_fit_timebase_sync();
 }
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c
index d329e6fe..613ba67d 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c
@@ -35,6 +35,7 @@
 #include "p9_pgpe_pstate.h"
 #include "qppm_firmware_registers.h"
 #include "qppm_register_addresses.h"
+#include "p9_pgpe_optrace.h"
 
 //
 //#Defines
@@ -92,6 +93,7 @@ void p9_pgpe_ipc_405_start_stop(ipc_msg_t* cmd, void* arg)
     {
         args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK;
         ipc_send_rsp(cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_START_STOP);
     }
 
     if (G_pgpe_pstate_record.alreadySemPosted == 0)
@@ -122,6 +124,7 @@ void p9_pgpe_ipc_405_clips(ipc_msg_t* cmd, void* arg)
     {
         args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK;
         ipc_send_rsp(cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_CLIP_UPDT);
     }
 
     if (G_pgpe_pstate_record.alreadySemPosted == 0)
@@ -183,6 +186,7 @@ void p9_pgpe_ipc_405_wof_control(ipc_msg_t* cmd, void* arg)
     {
         args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK;
         ipc_send_rsp(cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_WOF_CTRL);
     }
 
     if (G_pgpe_pstate_record.alreadySemPosted == 0)
@@ -213,6 +217,7 @@ void p9_pgpe_ipc_405_wof_vfrt(ipc_msg_t* cmd, void* arg)
     {
         args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK;
         ipc_send_rsp(cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_WOF_VFRT);
     }
 
     if (G_pgpe_pstate_record.alreadySemPosted == 0)
@@ -245,6 +250,7 @@ void p9_pgpe_ipc_sgpe_updt_active_cores(ipc_msg_t* cmd, void* arg)
             (ipcmsg_s2p_update_active_cores_t*)async_cmd->cmd_data;
         args->fields.return_code  = IPC_SGPE_PGPE_RC_REQ_WHILE_PENDING_ACK;
         ipc_send_rsp(cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_CORES_ACTV);
     }
 
     if (G_pgpe_pstate_record.alreadySemPosted == 0)
@@ -281,6 +287,7 @@ void p9_pgpe_ipc_sgpe_updt_active_quads(ipc_msg_t* cmd, void* arg)
             (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data;
         args->fields.return_code = IPC_SGPE_PGPE_RC_REQ_WHILE_PENDING_ACK;
         ipc_send_rsp(cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_QUAD_ACTV);
         PK_TRACE_INF("IPC: Updt Quads while pending");
     }
 
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c
index 39f6c042..12a9dd28 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c
@@ -29,7 +29,8 @@
 #include "p9_dd1_doorbell_wr.h"
 #include "ppe42_cache.h"
 #include "p9_pgpe_gppb.h"
-
+#include "p9_pgpe_optrace.h"
+extern TraceData_t G_pgpe_optrace_data;
 //
 //External Global Data
 //
@@ -127,7 +128,6 @@ void p9_pgpe_irq_handler_xstop_gpe2(void* arg, PkIrqId irq)
 void p9_pgpe_irq_handler_pcb_type1(void* arg, PkIrqId irq)
 {
     PK_TRACE_DBG("PCB1: Enter");
-
     PkMachineContext  ctx;
     ocb_opit1cn_t opit1cn;
     uint32_t c;
@@ -154,6 +154,10 @@ void p9_pgpe_irq_handler_pcb_type1(void* arg, PkIrqId irq)
                 //Extract the LowerPState field and store the Pstate request
                 G_pgpe_pstate_record.coresPSRequest[c] = opit1cn.value & 0xff;
                 PK_TRACE_DBG("PCB1: c[%d]=0%x", c, G_pgpe_pstate_record.coresPSRequest[c]);
+                G_pgpe_optrace_data.word[0] = (c << 24) | (G_pgpe_pstate_record.globalPSComputed << 16) |
+                                              G_pgpe_pstate_record.coresPSRequest[c];
+                //RTC:177526 GA1 only Phase1 data is used since only LowerPS fields is supported in PMCR
+                p9_pgpe_optrace(PRC_PCB_T1);
             }
         }
 
@@ -294,6 +298,9 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq)
                 quadAckExpect |= QUAD_MASK(q);
             }
 
+            G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.globalPSComputed << 16)
+                                          | (in32(OCB_QCSR) >> 16);
+            p9_pgpe_optrace(PRC_PCB_T4);
         }
     }
 
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c
index c93845f4..3f2976cc 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c
@@ -28,6 +28,7 @@
 #include "p9_pgpe_gppb.h"
 #include "p9_pgpe_boot_temp.h"
 #include "p9_pgpe_pstate.h"
+#include "p9_pgpe_optrace.h"
 
 PgpePstateRecord G_pgpe_pstate_record __attribute__((section (".dump_ptrs"))) =
 {
@@ -249,6 +250,8 @@ main(int argc, char** argv)
     g_oimr_override |= BIT64(49);
     out32(OCB_OIMR1_OR, BIT32(17)); //Disable PCB_INTR_TYPE4
 
+    p9_pgpe_optrace_init();
+
     PK_TRACE_DBG("Start PK Threads");
 
     // Start running the highest priority thread.
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c
new file mode 100644
index 00000000..2146e61e
--- /dev/null
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c
@@ -0,0 +1,91 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c $ */
+/*                                                                        */
+/* OpenPOWER HCODE Project                                                */
+/*                                                                        */
+/* COPYRIGHT 2016,2017                                                    */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+#include "pk.h"
+#include "p9_pgpe.h"
+#include "p9_pgpe_optrace.h"
+#include "p9_hcd_memmap_occ_sram.H"
+
+#define ADDRESS_MAX OCC_SRAM_PGPE_OPTRACE_ADDR + OCC_SRAM_PGPE_OPTRACE_SIZE - 0x8
+
+TraceData_t G_pgpe_optrace_data;
+uint32_t G_address;
+uint32_t G_data;
+uint32_t G_lastDisable;
+
+void p9_pgpe_optrace_init() //sets up address and initializes buffer to 0's
+{
+    G_lastDisable = 0;
+    G_address = OCC_SRAM_PGPE_OPTRACE_ADDR;
+
+    do
+    {
+        out32(G_address, 0);
+        G_address += 4;
+    }
+    while(G_address <= ADDRESS_MAX);
+
+    G_address = OCC_SRAM_PGPE_OPTRACE_ADDR;
+}
+void p9_pgpe_optrace(uint32_t mark)
+{
+    if(in32(OCB_OCCS2) & PGPE_OPTRACE_DISABLE) //Check to see if tracing is enabled
+    {
+        G_lastDisable = 1;
+    }
+    else
+    {
+        if(G_lastDisable) //Place start trace mark at when first enabled
+        {
+            G_lastDisable = 0;
+            p9_pgpe_optrace(ACK_START_TRACE);
+        }
+
+        uint32_t word_count = ((mark >> 4) & 0x3) + 1;
+
+        if((mark & 0x40))//If bit 1 of Mark is set there is a timestamp
+        {
+            G_pgpe_optrace_data.word[(word_count - 1)] = (mark << 24) | (in32(OCB_OTBR) & 0xFFFFFF);
+        }
+
+        uint32_t word;
+
+        for(word = 0; word < word_count; word++) //write out all words to  buffer
+        {
+            out32(G_address, G_pgpe_optrace_data.word[word]);
+
+            if(G_address == ADDRESS_MAX)
+            {
+                G_address =  OCC_SRAM_PGPE_OPTRACE_ADDR;
+            }
+            else
+            {
+                G_address += 0x4;
+            }
+        }
+
+        out32(ADDRESS_MAX + 0x4, G_address); //this address contains the oldest entry in the buffer
+
+    }
+}
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h
new file mode 100644
index 00000000..56000dfd
--- /dev/null
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h
@@ -0,0 +1,75 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h $ */
+/*                                                                        */
+/* OpenPOWER HCODE Project                                                */
+/*                                                                        */
+/* COPYRIGHT 2016,2017                                                    */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+#ifndef _P9_PGPE_TRACE_HEADER_
+#define _P9_PGPE_TRACE_HEADER_
+
+#define PGPE_OPTRACE_DISABLE 0x00000080
+#define START_STOP_IPC 0
+#define START_STOP_FLAG 1
+
+#define WOF_CALC_DONE     0x11
+#define AUCTION_DONE      0x10
+#define ACTUATE_STEP_DONE 0x73
+
+#define ACK_WOF_VFRT      0xC2
+#define ACK_WOF_CTRL      0xC4
+#define ACTL_BROADCAST    0xC5
+#define ACK_ACTL_DONE     0xC6
+#define ACK_CLIP_UPDT     0xC7
+#define ACK_START_STOP    0xC8
+#define RESERVED_TS_0     0xC9
+#define ACK_CORES_ACTV    0xCA
+#define ACK_QUAD_ACTV     0xCB
+#define ACK_START_TRACE   0xCC
+#define INV_TRC_REQ       0xCD
+#define ACK_PM_SUSP       0xCE
+#define ACK_SAFE_DONE     0xCF
+
+#define PRC_WOF_VFRT      0x62
+#define PRC_WOF_CTRL      0x54
+#define PRC_PCB_T4        0x55
+#define PRC_PCB_T1        0x56
+#define PRC_CLIP_UPDT     0x77
+#define PRC_START_STOP    0x58
+#define PRC_SET_PMCR      0x69
+#define PRC_CORES_ACTV    0x5A
+#define PRC_QUAD_ACTV     0x5B
+#define FIT_TB_SYNC       0x5C
+#define SGPE_SUSP_DONE    0x4D
+#define PRC_PM_SUSP       0x4E
+#define PRC_SAFE_MODE     0x5F
+
+
+//
+//Functions called by threads
+//
+typedef struct
+{
+    uint32_t word[4];
+} TraceData_t;
+
+void p9_pgpe_optrace_init();
+void p9_pgpe_optrace(uint32_t mark);
+#endif //
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
index f55598c3..e54595bc 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c
@@ -33,6 +33,7 @@
 #include "pstate_pgpe_occ_api.h"
 #include "wof_sgpe_pgpe_api.h"
 #include "p9_pgpe_header.h"
+#include "p9_pgpe_optrace.h"
 
 //
 //#Defines
@@ -43,6 +44,7 @@
 //
 //Global External Data
 //
+extern TraceData_t G_pgpe_optrace_data;
 extern PgpeHeader_t* G_pgpe_header_data;
 extern GlobalPstateParmBlock* G_gppb;
 extern uint32_t G_ext_vrm_inc_rate_mult_usperus;
@@ -303,9 +305,15 @@ void p9_pgpe_pstate_apply_clips()
                  G_pgpe_pstate_record.quadPSTarget[1],
                  G_pgpe_pstate_record.quadPSTarget[2],
                  G_pgpe_pstate_record.quadPSTarget[3]);
-    PK_TRACE_DBG("APC: [Target] qPSTgt: 0x%x[4] 0x%x[5] 0x%x(Glb)", G_pgpe_pstate_record.quadPSTarget[4],
-                 G_pgpe_pstate_record.quadPSTarget[5],
-                 G_pgpe_pstate_record.globalPSTarget);
+    G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.quadPSTarget[2] << 24) |
+                                  (G_pgpe_pstate_record.quadPSTarget[3] << 16) |
+                                  (G_pgpe_pstate_record.quadPSTarget[4] << 8) |
+                                  G_pgpe_pstate_record.quadPSTarget[5];
+    G_pgpe_optrace_data.word[1] = (AUCTION_DONE << 24) |
+                                  (G_pgpe_pstate_record.globalPSTarget << 16) |
+                                  (G_pgpe_pstate_record.quadPSTarget[0] << 8) |
+                                  G_pgpe_pstate_record.quadPSTarget[1];
+    p9_pgpe_optrace(AUCTION_DONE);
 }
 
 //
@@ -341,7 +349,13 @@ void p9_pgpe_pstate_calc_wof()
 
     PK_TRACE_DBG("WFC: FClip_PS=0x%x, vindex=%d, vratio=%d", G_pgpe_pstate_record.wofClip, G_pgpe_pstate_record.vindex,
                  G_pgpe_pstate_record.vratio);
-
+    G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.vratio << 16) |
+                                  (G_pgpe_pstate_record.fratio << 8);
+    G_pgpe_optrace_data.word[1] = (WOF_CALC_DONE << 24) |
+                                  (G_pgpe_pstate_record.wofClip << 16) |
+                                  (G_pgpe_pstate_record.activeQuads << 8) |
+                                  G_pgpe_pstate_record.numActiveCores;
+    p9_pgpe_optrace(WOF_CALC_DONE);
     p9_pgpe_pstate_apply_clips();
 }
 
@@ -414,6 +428,8 @@ void p9_pgpe_send_db0(uint64_t db0, uint32_t coreVector, uint32_t unicast, uint3
 
     //In case of unicast, only write DB0 for active cores. However, in case of
     //multicast just write DB0 of every configured core, but care only about active cores.
+    p9_pgpe_optrace(ACTL_BROADCAST);
+
     if (unicast == PGPE_DB0_UNICAST)
     {
         for (c = 0; c < MAX_CORES; c++)
@@ -471,6 +487,7 @@ void p9_pgpe_wait_cme_db_ack(uint32_t quadAckExpect)
         out32(OCB_OPIT4PRA_CLR, opit4Clr);
     }
 
+    p9_pgpe_optrace(ACK_ACTL_DONE);
     PK_TRACE_DBG("DBW:qCME ACKs rcvd");
 }
 
@@ -691,7 +708,7 @@ void p9_pgpe_pstate_start(uint32_t pstate_start_origin)
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0;
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS);
-
+        p9_pgpe_optrace(ACK_START_STOP);
     }
 
     PK_TRACE_INF("PST: Start Done");
@@ -705,6 +722,7 @@ void p9_pgpe_pstate_set_pmcr_owner(uint32_t owner)
     int q = 0;
     ocb_qcsr_t qcsr;
     qcsr.value = in32(OCB_QCSR);
+
 //Write to LMCR register in SIMICS results in error
 //So, adding a build flag for SIMICS.
 //For SIMICS, LMCR should be set through command line
@@ -771,6 +789,14 @@ void p9_pgpe_pstate_set_pmcr_owner(uint32_t owner)
         }
     }
 
+    G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.quadPSComputed[0] << 24) | (G_pgpe_pstate_record.quadPSComputed[1]
+                                  << 16) |
+                                  (G_pgpe_pstate_record.quadPSComputed[2] << 8) | G_pgpe_pstate_record.quadPSComputed[3];
+    G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.quadPSComputed[4] << 24) | (G_pgpe_pstate_record.quadPSComputed[5]
+                                  << 16) |
+                                  G_pgpe_pstate_record.globalPSComputed << 8;
+    p9_pgpe_optrace(PRC_SET_PMCR);
+
 #endif
 }
 
@@ -880,7 +906,7 @@ void p9_pgpe_pstate_process_quad_entry_notify(uint32_t quadsRequested)
     args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS;
     G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0;
     ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS);
-
+    p9_pgpe_optrace(ACK_QUAD_ACTV);
     PK_TRACE_INF("QE:(Notify) End,qAct=%x\n", G_pgpe_pstate_record.activeQuads);
 }
 
@@ -905,7 +931,7 @@ void p9_pgpe_pstate_process_quad_entry_done(uint32_t quadsRequested)
     args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS;
     G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0;
     ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS);
-
+    p9_pgpe_optrace(ACK_QUAD_ACTV);
     PK_TRACE_INF("QE:(Done) End,qAct=%x\n", G_pgpe_pstate_record.activeQuads);
 }
 
@@ -958,7 +984,7 @@ void p9_pgpe_pstate_process_quad_exit(uint32_t quadsRequested)
     args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS;
     G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0;
     ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS);
-
+    p9_pgpe_optrace(ACK_QUAD_ACTV);
     PK_TRACE_INF("QX:End,qAct=%x\n", G_pgpe_pstate_record.activeQuads);
 }
 
@@ -991,6 +1017,15 @@ void p9_pgpe_pstate_safe_mode()
     PK_TRACE_INF("SAF: Safe Mode Enter");
     uint32_t occScr2 = in32(OCB_OCCS2);
     uint32_t suspend = in32(OCB_OCCFLG) & BIT32(PM_COMPLEX_SUSPEND);
+    uint32_t trace = suspend ? PRC_PM_SUSP : PRC_SAFE_MODE;
+
+    if(!suspend)
+    {
+        G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.globalPSComputed << 16)
+                                      | (G_pgpe_pstate_record.safePstate << 8) | ((in32(OCB_OCCFLG) & BIT32(PGPE_SAFE_MODE)) ? 1 : 0);
+    }
+
+    p9_pgpe_optrace(trace);
 
     if (G_pgpe_pstate_record.pstatesStatus == PSTATE_ACTIVE)
     {
@@ -1009,6 +1044,8 @@ void p9_pgpe_pstate_safe_mode()
     }
 
     G_pgpe_pstate_record.pstatesStatus = suspend ? PSTATE_PM_SUSPEND_PENDING : PSTATE_SAFE_MODE;
+    trace = suspend ? ACK_PM_SUSP : ACK_SAFE_DONE;
+    p9_pgpe_optrace(trace);
     occScr2 &= ~BIT32(PGPE_PSTATE_PROTOCOL_ACTIVE);
     out32(OCB_OCCS2, occScr2);
     PK_TRACE_INF("SAF: Safe Mode Exit");
@@ -1077,6 +1114,7 @@ void p9_pgpe_pstate_send_suspend_stop()
 void p9_pgpe_suspend_stop_callback(ipc_msg_t* msg, void* arg)
 {
     PK_TRACE_INF("SUSP:Stop Cb");
+    p9_pgpe_optrace(SGPE_SUSP_DONE);
     uint32_t occScr2 = in32(OCB_OCCS2);
     occScr2 |= BIT32(PM_COMPLEX_SUSPENDED);
     G_pgpe_pstate_record.pstatesStatus = PSTATE_PM_SUSPENDED;
@@ -1244,7 +1282,14 @@ void p9_pgpe_pstate_do_step()
 
     //Update Shared SRAM
     p9_pgpe_pstate_updt_actual_quad(0xFC);
-
+    G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.quadPSComputed[0] << 24) | (G_pgpe_pstate_record.quadPSComputed[1]
+                                  << 16) |
+                                  (G_pgpe_pstate_record.quadPSComputed[2] << 8) | G_pgpe_pstate_record.quadPSComputed[3];
+    G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.quadPSComputed[4] << 24) | (G_pgpe_pstate_record.quadPSComputed[5]
+                                  << 16) |
+                                  G_pgpe_pstate_record.globalPSNext << 8 | G_pgpe_pstate_record.globalPSTarget;
+    G_pgpe_optrace_data.word[2] = (G_pgpe_pstate_record.eVidCurr << 16) | G_pgpe_pstate_record.eVidCurr;
+    p9_pgpe_optrace(ACTUATE_STEP_DONE);
     PK_TRACE_DBG("STEP: Exit");
 
 }
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c
index 3a22b0d8..9632687a 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_actuate_pstates.c
@@ -33,10 +33,12 @@
 #include "wof_sgpe_pgpe_api.h"
 #include "p9_dd1_doorbell_wr.h"
 #include "avs_driver.h"
+#include "p9_pgpe_optrace.h"
 
 //
 //Externs and Globals
 //
+extern TraceData_t G_pgpe_optrace_data;
 extern PgpePstateRecord G_pgpe_pstate_record;
 extern ipc_async_cmd_t G_ipc_msg_pgpe_sgpe;
 GPE_BUFFER(extern ipcmsg_p2s_ctrl_stop_updates_t G_sgpe_control_updt);
@@ -74,6 +76,9 @@ void p9_pgpe_thread_actuate_pstates(void* arg)
         //Mask all external interrupts. Timers are still enabled
         pk_irq_sub_critical_enter(&ctx);
         p9_pgpe_pstate_start(PSTATE_START_OCC_FLAG);
+        G_pgpe_optrace_data.word[0] = (START_STOP_FLAG << 24) | (G_pgpe_pstate_record.globalPSComputed << 16) | (in32(
+                                          OCB_QCSR) >> 16);
+        p9_pgpe_optrace(PRC_START_STOP);
         pk_irq_sub_critical_exit(&ctx);
     }
 
@@ -177,6 +182,7 @@ void p9_pgpe_thread_actuate_pstates(void* arg)
                         args->msg_cb.rc = PGPE_RC_SUCCESS;
                         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].pending_ack = 0;
                         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].cmd, IPC_RC_SUCCESS);
+                        p9_pgpe_optrace(ACK_CLIP_UPDT);
                     }
 
                     if (G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_VFRT].pending_ack == 1)
@@ -187,6 +193,7 @@ void p9_pgpe_thread_actuate_pstates(void* arg)
                         args_wof_vfrt->msg_cb.rc = PGPE_RC_SUCCESS;
                         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_VFRT].pending_ack = 0;
                         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_VFRT].cmd, IPC_RC_SUCCESS);
+                        p9_pgpe_optrace(ACK_WOF_VFRT);
 
                         //See if ACTIVE QUADS ack is pending
                         if (G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack == 1)
@@ -197,6 +204,7 @@ void p9_pgpe_thread_actuate_pstates(void* arg)
                             args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS;
                             G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0;
                             ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS);
+                            p9_pgpe_optrace(ACK_QUAD_ACTV);
                         }
                     }
 
@@ -208,6 +216,7 @@ void p9_pgpe_thread_actuate_pstates(void* arg)
                         args->msg_cb.rc = PGPE_RC_SUCCESS;
                         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].pending_ack = 0;
                         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].cmd, IPC_RC_SUCCESS);
+                        p9_pgpe_optrace(ACK_WOF_CTRL);
                     }
 
                     if(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack == 1)
@@ -219,6 +228,7 @@ void p9_pgpe_thread_actuate_pstates(void* arg)
                         args->fields.return_active_cores = G_pgpe_pstate_record.activeCores;
                         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0;
                         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS);
+                        p9_pgpe_optrace(ACK_CORES_ACTV);
                     }
 
                     restore_irq = 1;
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c
index 79ab0845..fb0dc846 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c
@@ -30,10 +30,12 @@
 #include "ipc_api.h"
 #include "ipc_async_cmd.h"
 #include "p9_pgpe_header.h"
+#include "p9_pgpe_optrace.h"
 
 //
 //External Global Data
 //
+extern TraceData_t G_pgpe_optrace_data;
 extern PgpePstateRecord G_pgpe_pstate_record;
 extern PgpeHeader_t* G_pgpe_header_data;
 GPE_BUFFER(extern ipcmsg_p2s_ctrl_stop_updates_t G_sgpe_control_updt);
@@ -175,6 +177,7 @@ void p9_pgpe_process_sgpe_updt_active_cores()
         args->fields.return_code = IPC_SGPE_PGPE_RC_PM_COMPLEX_SUSPEND;
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_CORES_ACTV);
     }
     else
     {
@@ -186,6 +189,7 @@ void p9_pgpe_process_sgpe_updt_active_cores()
             args->fields.return_code = PGPE_WOF_RC_NOT_ENABLED;
             G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0;
             ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS);
+            p9_pgpe_optrace(ACK_CORES_ACTV);
         }
         else
         {
@@ -210,6 +214,8 @@ void p9_pgpe_process_sgpe_updt_active_cores()
             //Do auction and wof calculation
             p9_pgpe_pstate_do_auction();
             p9_pgpe_pstate_calc_wof();
+            G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.activeCores >> 8);
+            p9_pgpe_optrace(PRC_CORES_ACTV);
 
             //If ENTRY type then send ACK to SGPE immediately
             //Otherwise, wait to ACK until WOF Clip has been applied(from actuate_pstate thread)
@@ -219,6 +225,7 @@ void p9_pgpe_process_sgpe_updt_active_cores()
                 args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS;
                 G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0;
                 ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS);
+                p9_pgpe_optrace(ACK_CORES_ACTV);
                 PK_TRACE_DBG("PTH: Core Updt ENTRY ACKed");
             }
         }
@@ -233,7 +240,6 @@ void p9_pgpe_process_sgpe_updt_active_cores()
 void p9_pgpe_process_sgpe_updt_active_quads()
 {
     PK_TRACE_DBG("PTH: Quad Updt Start");
-
     ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd;
     ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data;
     G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_processing = 0;
@@ -246,9 +252,13 @@ void p9_pgpe_process_sgpe_updt_active_quads()
         args->fields.return_code = IPC_SGPE_PGPE_RC_PM_COMPLEX_SUSPEND;
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_QUAD_ACTV);
     }
     else
     {
+        G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.activeCores >> 8);
+        p9_pgpe_optrace(PRC_QUAD_ACTV);
+
         //ENTRY
         if (args->fields.update_type == UPDATE_ACTIVE_QUADS_TYPE_ENTRY)
         {
@@ -277,6 +287,7 @@ void p9_pgpe_process_sgpe_updt_active_quads()
                 p9_pgpe_pstate_process_quad_exit(args->fields.requested_quads << 2);
             }
         }
+
     }
 
     PK_TRACE_DBG("PTH: Quad Updt End");
@@ -293,6 +304,7 @@ void p9_pgpe_process_start_stop()
         PK_TRACE_DBG("START_STOP: Imm");
         args->msg_cb.rc = PGPE_RC_SUCCESS;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_START_STOP);
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0;
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0;
     }
@@ -303,6 +315,7 @@ void p9_pgpe_process_start_stop()
         PK_TRACE_DBG("START_STOP: PM_SUSP/Safe");
         args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_START_STOP);
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0;
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0;
     }
@@ -324,6 +337,7 @@ void p9_pgpe_process_start_stop()
                 G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0;
                 G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0;
                 ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS);
+                p9_pgpe_optrace(ACK_START_STOP);
             }
         }
         else
@@ -334,6 +348,7 @@ void p9_pgpe_process_start_stop()
                 PK_TRACE_DBG("START_STOP: Already Stopped");
                 args->msg_cb.rc = PGPE_RC_REQ_PSTATE_ALREADY_STOPPED;
                 ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS);
+                p9_pgpe_optrace(ACK_START_STOP);
                 G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0;
                 G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0;
             }
@@ -346,10 +361,15 @@ void p9_pgpe_process_start_stop()
                 G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0;
                 G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0;
                 ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS);
+                p9_pgpe_optrace(ACK_START_STOP);
             }
         }
     }
 
+    G_pgpe_optrace_data.word[0] = (START_STOP_IPC << 24) | (G_pgpe_pstate_record.globalPSComputed << 16) | (in32(
+                                      OCB_QCSR) >> 16);
+    p9_pgpe_optrace(PRC_START_STOP);
+
     PK_TRACE_DBG("PTH: Start/Stop End");
 }
 
@@ -415,8 +435,16 @@ void p9_pgpe_process_clip_updt()
     {
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].pending_ack = 0;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_CLIP_UPDT);
     }
 
+    G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.psClipMax[0] << 24) | (G_pgpe_pstate_record.psClipMax[1] << 16) |
+                                  (G_pgpe_pstate_record.psClipMax[2] << 8)  | (G_pgpe_pstate_record.psClipMax[3]);
+    G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.psClipMax[4] << 24) | (G_pgpe_pstate_record.psClipMax[5] << 16) |
+                                  (G_pgpe_pstate_record.psClipMin[0] << 8)  | (G_pgpe_pstate_record.psClipMin[1]);
+    G_pgpe_optrace_data.word[2] = (G_pgpe_pstate_record.psClipMin[2] << 24) | (G_pgpe_pstate_record.psClipMin[3] << 16) |
+                                  (G_pgpe_pstate_record.psClipMin[4] << 8)  | (G_pgpe_pstate_record.psClipMin[5]);
+    p9_pgpe_optrace(PRC_CLIP_UPDT);
     PK_TRACE_DBG("PTH: Clip Upd Exit");
 }
 
@@ -431,6 +459,7 @@ void p9_pgpe_process_wof_ctrl()
     ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].cmd;
     ipcmsg_wof_control_t* args = (ipcmsg_wof_control_t*)async_cmd->cmd_data;
 
+
     G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].pending_processing = 0;
 
     if((G_pgpe_header_data->g_pgpe_qm_flags & BIT16(PGPE_HEADER_FLAGS_OCC_IPC_IMMEDIATE_MODE)) ||
@@ -571,13 +600,17 @@ void p9_pgpe_process_wof_ctrl()
         }
     }
 
+    G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (args->action << 16) | (in32(
+                                      OCB_QCSR) >> 16);
+    p9_pgpe_optrace(PRC_WOF_CTRL);
+
     if (ack_now == 1)
     {
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].pending_ack = 0;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_WOF_CTRL);
     }
 
-
     PK_TRACE_DBG("PTH: WOF Ctrl Exit");
 }
 
@@ -627,6 +660,13 @@ void p9_pgpe_process_wof_vfrt()
                      G_pgpe_pstate_record.pVFRT->vfrtHeader.type_version,
                      G_pgpe_pstate_record.pVFRT->vfrtHeader.res_vdnId,
                      G_pgpe_pstate_record.pVFRT->vfrtHeader.VddId_QAId);
+        G_pgpe_optrace_data.word[0] = ((G_pgpe_pstate_record.pVFRT->vfrtHeader.magic_number << 16) |
+                                       G_pgpe_pstate_record.pVFRT->vfrtHeader.reserved);
+        G_pgpe_optrace_data.word[1] = ((G_pgpe_pstate_record.pVFRT->vfrtHeader.type_version << 24) |
+                                       (G_pgpe_pstate_record.pVFRT->vfrtHeader.res_vdnId    << 16) |
+                                       (G_pgpe_pstate_record.pVFRT->vfrtHeader.VddId_QAId   << 8)  |
+                                       G_pgpe_pstate_record.pVFRT->vfrtHeader.rsvd_QAId);
+        p9_pgpe_optrace(PRC_WOF_VFRT);
 
         if(G_pgpe_pstate_record.wofEnabled == 1)
         {
@@ -643,6 +683,7 @@ void p9_pgpe_process_wof_vfrt()
     {
         G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_VFRT].pending_ack = 0;
         ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_VFRT].cmd, IPC_RC_SUCCESS);
+        p9_pgpe_optrace(ACK_WOF_VFRT);
     }
 
     PK_TRACE_DBG("PTH: WOF VFRT Exit");
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/topfiles.mk b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/topfiles.mk
index cd19162b..b1c64228 100644
--- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/topfiles.mk
+++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/topfiles.mk
@@ -36,7 +36,8 @@ TOP-C-SOURCES = p9_pgpe_pstate.c \
 				p9_pgpe_thread_actuate_pstates.c \
 				p9_pgpe_thread_process_requests.c \
 				p9_pgpe_ipc_handlers.c \
-				p9_pgpe_irq_handlers.c 
+				p9_pgpe_irq_handlers.c \
+				p9_pgpe_optrace.c 
 
 TOP-S-SOURCES = p9_pgpe_image_header.S \
                 p9_pgpe_ppmr.S