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| author | Rahul Batra <rbatra@us.ibm.com> | 2019-05-20 23:54:22 -0400 |
|---|---|---|
| committer | Raptor Engineering Development Team <support@raptorengineering.com> | 2019-07-12 16:12:33 +0000 |
| commit | d7ef740ff73a3ba93dbe6b45ed1fbd236654845b (patch) | |
| tree | 429957a7344599774e8c145d6dc9361a13058b1d /import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c | |
| parent | 81ae5fdcc3c4018eb9229ff73edf8851c2a73a07 (diff) | |
| download | talos-hcode-d7ef740ff73a3ba93dbe6b45ed1fbd236654845b.tar.gz talos-hcode-d7ef740ff73a3ba93dbe6b45ed1fbd236654845b.zip | |
PGPE: Fix Voltage Delay Math
- fix attribute consumption in busy-wait implementation
Key_Cronus_Test=PM_REGRESS
Change-Id: Ifc38fb147fd6c202154b5c3d930c638e1f110583
CQ: SW465588
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77667
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c index 0beff6d9..d53d5fc4 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c @@ -49,8 +49,8 @@ extern TraceData_t G_pgpe_optrace_data; extern PgpeHeader_t* G_pgpe_header_data; extern GlobalPstateParmBlock* G_gppb; -extern uint32_t G_ext_vrm_inc_rate_mult_usperus; -extern uint32_t G_ext_vrm_dec_rate_mult_usperus; +extern uint32_t G_ext_vrm_inc_rate_mult_usperv; +extern uint32_t G_ext_vrm_dec_rate_mult_usperv; extern PgpePstateRecord G_pgpe_pstate_record; extern void p9_pgpe_ipc_ack_sgpe_ctrl_stop_updt(ipc_msg_t* msg, void* arg); extern void p9_pgpe_ipc_ack_sgpe_suspend_stop(ipc_msg_t* msg, void* arg); @@ -2065,7 +2065,7 @@ void p9_pgpe_pstate_updt_ext_volt() //to keep the math simple(use shift instead of multiply) we approximate //1us as (1024/32)=32 OTBR ticks delay_ticks = ((G_pgpe_pstate_record.extVrmCurr - G_pgpe_pstate_record.extVrmNext) * - G_ext_vrm_dec_rate_mult_usperus) << 5; + G_ext_vrm_dec_rate_mult_usperv) >> 5; } //Increasing else if (G_pgpe_pstate_record.extVrmNext > G_pgpe_pstate_record.extVrmCurr) @@ -2074,7 +2074,7 @@ void p9_pgpe_pstate_updt_ext_volt() //to keep the math simple(use shift instead of multiply) we approximate //1us as (1024/32)=32 OTBR ticks delay_ticks = ((G_pgpe_pstate_record.extVrmNext - G_pgpe_pstate_record.extVrmCurr) * - G_ext_vrm_inc_rate_mult_usperus) << 5; + G_ext_vrm_inc_rate_mult_usperv) >> 5; } #endif @@ -2118,7 +2118,7 @@ void p9_pgpe_pstate_updt_ext_volt() if(G_pgpe_pstate_record.biasSyspExtVrmNext == p9_pgpe_gppb_intp_vdd_from_ps(G_pgpe_pstate_record.psNext.fields.glb, VPD_PT_SET_BIASED_SYSP)) { - delay_ticks = G_gppb->ext_vrm_stabilization_time_us << 5; + delay_ticks = G_gppb->ext_vrm_stabilization_time_us >> 5; //Read TimebaseStart tbStart = in32(OCB_OTBR); |
