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author | Rahul Batra <rbatra@us.ibm.com> | 2017-05-26 11:27:12 -0500 |
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committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:44:46 -0500 |
commit | fab2a2fe2f0d812a7a7877bdc5a23862272e3355 (patch) | |
tree | 6b7e84eeed1cf46a933ea8c2a945a52761f34ddb /import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c | |
parent | d697ff279dde0b010a0dd4b7463f62c8e58f33f1 (diff) | |
download | talos-hcode-fab2a2fe2f0d812a7a7877bdc5a23862272e3355.tar.gz talos-hcode-fab2a2fe2f0d812a7a7877bdc5a23862272e3355.zip |
PSTATE: PGPE Fixes for PMCR CHAR/HOST Mode
- Fixes issue dynamic PMCR Ownership change
- Fixes PCB_TYPE1 interrupt miss
Change-Id: Icf5d5f11376825c1807a9a49e7db644bdc347ec2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41175
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c')
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c index 290e6082..89efed48 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c @@ -168,11 +168,25 @@ void p9_pgpe_irq_handler_pcb_type1(void* arg, PkIrqId irq) PkMachineContext ctx; ocb_opit0cn_t opit0cn; ocb_opit1cn_t opit1cn; - uint32_t coresPendPSReq = in32(OCB_OPIT1PRA); uint32_t c; + uint32_t coresPendPSReq = 0; + uint32_t opit4pra; - if (G_pgpe_pstate_record.pstatesStatus == PSTATE_ACTIVE && (G_pgpe_pstate_record.pmcrOwner == PMCR_OWNER_HOST || - G_pgpe_pstate_record.pmcrOwner == PMCR_OWNER_CHAR)) + //Incrementally build a snapshot of core requests + opit4pra = in32(OCB_OPIT1PRA); + coresPendPSReq = opit4pra; + + //Keep looping until no more core requests + while(opit4pra) + { + out32(OCB_OPIT1PRA_CLR, opit4pra); + coresPendPSReq |= opit4pra; + opit4pra = in32(OCB_OPIT1PRA); + } + + if (G_pgpe_pstate_record.pstatesStatus == PSTATE_ACTIVE && + (G_pgpe_pstate_record.pmcrOwner == PMCR_OWNER_HOST || + G_pgpe_pstate_record.pmcrOwner == PMCR_OWNER_CHAR)) { //Process pending requests @@ -196,7 +210,7 @@ void p9_pgpe_irq_handler_pcb_type1(void* arg, PkIrqId irq) { //Extract the LowerPState field G_pgpe_pstate_record.coresPSRequest[c] = op1 & 0xff; - out32(OCB_OPIT1PRA_CLR, 0x80000000 >> c); //Clear out pending bits + PK_TRACE_DBG("PCB_TYPE1: c[%d]=0%x\n", c, G_pgpe_pstate_record.coresPSRequest[c]); } } } |