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| author | Rahul Batra <rbatra@us.ibm.com> | 2019-05-20 23:54:22 -0400 |
|---|---|---|
| committer | Raptor Engineering Development Team <support@raptorengineering.com> | 2019-07-12 16:12:33 +0000 |
| commit | d7ef740ff73a3ba93dbe6b45ed1fbd236654845b (patch) | |
| tree | 429957a7344599774e8c145d6dc9361a13058b1d /import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c | |
| parent | 81ae5fdcc3c4018eb9229ff73edf8851c2a73a07 (diff) | |
| download | talos-hcode-d7ef740ff73a3ba93dbe6b45ed1fbd236654845b.tar.gz talos-hcode-d7ef740ff73a3ba93dbe6b45ed1fbd236654845b.zip | |
PGPE: Fix Voltage Delay Math
- fix attribute consumption in busy-wait implementation
Key_Cronus_Test=PM_REGRESS
Change-Id: Ifc38fb147fd6c202154b5c3d930c638e1f110583
CQ: SW465588
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77667
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c index ee54b194..594c3550 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_gppb.c @@ -72,8 +72,8 @@ const uint8_t G_vdm_threshold_table[13] = //Globals and externs GlobalPstateParmBlock* G_gppb;//Global pointer to GlobalPstateParmBlock -uint32_t G_ext_vrm_inc_rate_mult_usperus; -uint32_t G_ext_vrm_dec_rate_mult_usperus; +uint32_t G_ext_vrm_inc_rate_mult_usperv; +uint32_t G_ext_vrm_dec_rate_mult_usperv; extern PgpeHeader_t* G_pgpe_header_data; // @@ -94,11 +94,11 @@ void p9_pgpe_gppb_init() G_gppb = (GlobalPstateParmBlock*)gppb_sram_offset; //PK_TRACE_INF("INIT: DPLL0Value=0x%x", G_gppb->dpll_pstate0_value); - //External VRM increasing rate in us/uv - G_ext_vrm_inc_rate_mult_usperus = 1 / G_gppb->ext_vrm_transition_rate_inc_uv_per_us; + //External VRM increasing rate in us/v + G_ext_vrm_inc_rate_mult_usperv = (1000 * 1000) / G_gppb->ext_vrm_transition_rate_inc_uv_per_us; - //External VRM decreasing rate in us/uv - G_ext_vrm_dec_rate_mult_usperus = 1 / G_gppb->ext_vrm_transition_rate_dec_uv_per_us; + //External VRM decreasing rate in us/v + G_ext_vrm_dec_rate_mult_usperv = (1000 * 1000) / G_gppb->ext_vrm_transition_rate_dec_uv_per_us; } // |
