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author | Yue Du <daviddu@us.ibm.com> | 2017-06-23 13:44:32 -0500 |
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committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 18:04:21 -0500 |
commit | d5bc1c1702554f690e1f193c7022c8c7ca4afd4c (patch) | |
tree | 781d3fb72ef7d93a8ed9c9ba7b15505208c1af72 /import/chips/p9/procedures/ppe_closed/cme | |
parent | 8d6d00f8d278d3738dd304b42359182af944686a (diff) | |
download | talos-hcode-d5bc1c1702554f690e1f193c7022c8c7ca4afd4c.tar.gz talos-hcode-d5bc1c1702554f690e1f193c7022c8c7ca4afd4c.zip |
STOP: Suspend stop to cmes
Change-Id: Icf1d999dd6e27bb67812c75e5c2b2e683c0b7400
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42379
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Adam S. Hale <adam.samuel.hale@ibm.com>
Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme')
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c index 6d360416..1c7fa20e 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c @@ -256,7 +256,17 @@ p9_cme_stop_db1_handler(void* arg, PkIrqId irq) { G_cme_stop_record.core_blockwu |= CME_MASK_BC; g_eimr_override |= IRQ_VEC_WAKE_C0 | IRQ_VEC_WAKE_C1; + + // Set AUTO_STOP1_DISABLE + out32(CME_LCL_LMCR_OR, BIT32(18)); + + // Set PM_BLOCK_INTERRUPTS out32(CME_LCL_SICR_OR, BITS32(2, 2)); + + // Clear PM_EXIT + out32(CME_LCL_SICR_CLR, BITS32(4, 2)); + + // Block Exit Enabled out32(CME_LCL_FLAGS_OR, BITS32(8, 2)); } @@ -265,6 +275,11 @@ p9_cme_stop_db1_handler(void* arg, PkIrqId irq) { G_cme_stop_record.core_blockey |= CME_MASK_BC; g_eimr_override |= IRQ_VEC_STOP_C0 | IRQ_VEC_STOP_C1; + + // Clear PM_ENTRY_ACK + out32(CME_LCL_SICR_CLR, BITS32(0, 2)); + + // Block Entry Enabled out32(CME_LCL_FLAGS_OR, BITS32(10, 2)); } } @@ -279,7 +294,14 @@ p9_cme_stop_db1_handler(void* arg, PkIrqId irq) { G_cme_stop_record.core_blockwu &= ~CME_MASK_BC; g_eimr_override &= ~(IRQ_VEC_WAKE_C0 | IRQ_VEC_WAKE_C1); + + // Clear AUTO_STOP1_DISABLE + out32(CME_LCL_LMCR_CLR, BIT32(18)); + + // Clear PM_BLOCK_INTERRUPTS out32(CME_LCL_SICR_CLR, BITS32(2, 2)); + + // Block Exit Disabled out32(CME_LCL_FLAGS_CLR, BITS32(8, 2)); } @@ -288,6 +310,8 @@ p9_cme_stop_db1_handler(void* arg, PkIrqId irq) { G_cme_stop_record.core_blockey &= ~CME_MASK_BC; g_eimr_override &= ~(IRQ_VEC_STOP_C0 | IRQ_VEC_STOP_C1); + + // Block Entry Disabled out32(CME_LCL_FLAGS_CLR, BITS32(10, 2)); } } |