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authorChristopher M. Riedl <cmriedl@us.ibm.com>2017-07-18 09:06:15 -0500
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2017-10-23 18:40:03 -0500
commitd47c3d351b061ab18d84f1d0d46b6035b0422d35 (patch)
treedc63664e9cf4a8fd0935c0badc60b90f962a61bb /import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
parent20c11979e9e1adc7bbd4762759f9f2a3a88354f6 (diff)
downloadtalos-hcode-d47c3d351b061ab18d84f1d0d46b6035b0422d35.tar.gz
talos-hcode-d47c3d351b061ab18d84f1d0d46b6035b0422d35.zip
PM: Implement L2 Resclk Function
Change-Id: I0efbab5defe2ffbd5c5fe86690c6e7a498f3c4d1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43331 Reviewed-by: YUE DU <daviddu@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com> Reviewed-by: BRIAN D. VICTOR <brian.d.victor1@ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c')
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c86
1 files changed, 79 insertions, 7 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
index b387d73d..b54bb458 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
@@ -26,9 +26,11 @@
#include "p9_cme_stop.h"
#include "p9_cme_stop_enter_marks.h"
#include "p9_cme_irq.h"
+#include "p9_cme_pstate.h"
-extern CmeStopRecord G_cme_stop_record;
-extern CmeRecord G_cme_record;
+extern CmeStopRecord G_cme_stop_record;
+extern CmePstateRecord G_cme_pstate_record;
+extern CmeRecord G_cme_record;
@@ -60,7 +62,7 @@ p9_cme_stop_pcwu_handler(void* arg, PkIrqId irq)
if (!(scom_data.words.upper & BIT32(10)))
{
pig.fields.req_intr_type = PIG_TYPE2;
- pig.fields.req_intr_payload = 0x400;
+ pig.fields.req_intr_payload = TYPE2_PAYLOAD_DECREMENTER_WAKEUP;
CME_PUTSCOM_NOP(PPM_PIG, core_mask, pig.value);
}
@@ -94,6 +96,7 @@ p9_cme_stop_pcwu_handler(void* arg, PkIrqId irq)
}
+
// When take an Interrupt on falling edge of SPWU from a CPPM.
// 1) Read EINR to check if another one has been set
// in the meantime from the same core. If so abort.
@@ -234,27 +237,96 @@ p9_cme_stop_enter_handler(void* arg, PkIrqId irq)
#endif
}
+
+
void
p9_cme_stop_db2_handler(void* arg, PkIrqId irq)
{
PkMachineContext ctx __attribute__((unused));
+ cppm_cmedb2_t db2 = {0};
+ ppm_pig_t pig = {0};
MARK_TRAP(STOP_DB2_HANDLER)
PK_TRACE_DBG("DB2 Handler Trigger %d", irq);
// read and clear doorbell
uint32_t core = (in32(CME_LCL_EISR) & BITS32(18, 2)) >> SHIFT32(19);
+ CME_GETSCOM(CPPM_CMEDB2, core, db2.value);
CME_PUTSCOM_NOP(CPPM_CMEDB2, core, 0);
out32(CME_LCL_EISR_CLR, (core << SHIFT32(19)));
- // unmask pc interrupt pending to wakeup that is still pending
- core &= (~(G_cme_stop_record.core_running));
- G_cme_stop_record.core_blockpc &= ~core;
- g_eimr_override &= ~(((uint64_t)core) << SHIFT64(13));
+ switch (db2.fields.cme_message_numbern)
+ {
+ case MSGID_DB2_DECREMENTER_WAKEUP:
+
+ // unmask pc interrupt pending to wakeup that is still pending
+ core &= (~(G_cme_stop_record.core_running));
+ G_cme_stop_record.core_blockpc &= ~core;
+ g_eimr_override &= ~(((uint64_t)core) << SHIFT64(13));
+ break;
+
+ case MSGID_DB2_RESONANT_CLOCK_DISABLE:
+
+#if (NIMBUS_DD_LEVEL < 21 || CUMULUS_DD_LEVEL == 10) && DISABLE_STOP8 == 1
+#ifdef USE_CME_RESCLK_FEATURE
+
+ // Quad going into Stop11, need to potentially disable Resclks
+ if((in32(CME_LCL_FLAGS) & BIT32(CME_FLAGS_RCLK_OPERABLE))
+ && G_cme_pstate_record.qmFlag)
+ {
+ PkMachineContext ctx;
+ pk_critical_section_enter(&ctx);
+
+ p9_cme_resclk_update(ANALOG_COMMON, ANALOG_PSTATE_RESCLK_OFF,
+ G_cme_pstate_record.resclkData.common_resclk_idx);
+
+ pk_critical_section_exit(&ctx);
+ }
+
+#endif
+#endif
+ // Finish handshake with SGPE for Stop11 via PIG
+ pig.fields.req_intr_type = PIG_TYPE3;
+ pig.fields.req_intr_payload = TYPE2_PAYLOAD_ENTRY_RCLK | STOP_LEVEL_11;
+ CME_PUTSCOM_NOP(PPM_PIG, core, pig.value);
+ break;
+
+ case MSGID_DB2_RESONANT_CLOCK_ENABLE:
+
+#if (NIMBUS_DD_LEVEL < 21 || CUMULUS_DD_LEVEL == 10) && DISABLE_STOP8 == 1
+#ifdef USE_CME_RESCLK_FEATURE
+
+ // Quad aborted Stop11, need to regressively enable Resclks
+ // IF wakeup from fully entered Stop11, this is done by QM
+ if((in32(CME_LCL_FLAGS) & BIT32(CME_FLAGS_RCLK_OPERABLE))
+ && G_cme_pstate_record.qmFlag)
+ {
+ PkMachineContext ctx;
+ pk_critical_section_enter(&ctx);
+
+ p9_cme_resclk_update(ANALOG_COMMON, G_cme_pstate_record.quadPstate,
+ G_cme_pstate_record.resclkData.common_resclk_idx);
+
+ pk_critical_section_exit(&ctx);
+ }
+
+#endif
+#endif
+ // Finish handshake with SGPE for Stop11 via PIG
+ pig.fields.req_intr_type = PIG_TYPE3;
+ pig.fields.req_intr_payload = TYPE2_PAYLOAD_EXIT_RCLK;
+ CME_PUTSCOM_NOP(PPM_PIG, core, pig.value);
+ break;
+
+ default:
+ break;
+ }
pk_irq_vec_restore(&ctx);
}
+
+
void
p9_cme_stop_db1_handler(void* arg, PkIrqId irq)
{
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