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| author | Yue Du <daviddu@us.ibm.com> | 2017-11-01 15:23:31 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2018-02-01 15:39:25 -0600 |
| commit | bd96030e124b5237790f28426a36f8a79b689b0d (patch) | |
| tree | 645b619da3c56439665beb3257390eb06b4a9a9a /import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c | |
| parent | 44213388a5890a4762620da353cc1c28b9ff3d49 (diff) | |
| download | talos-hcode-bd96030e124b5237790f28426a36f8a79b689b0d.tar.gz talos-hcode-bd96030e124b5237790f28426a36f8a79b689b0d.zip | |
STOP: Fix IOTA open new CME Interrupt window conditions
Key_Cronus_Test=PM_REGRESS
Change-Id: I50c512c794bd25846539daeecd33638c5f7f70ef
CQ: SW408384
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49110
Dev-Ready: YUE DU <daviddu@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c index 874e9892..9115142b 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HCODE Project */ /* */ -/* COPYRIGHT 2015,2017 */ +/* COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -83,6 +83,7 @@ p9_cme_stop_pcwu_handler(void* arg, PkIrqId irq) { out32(CME_LCL_EIMR_OR, BITS32(12, 10)); #if defined(__IOTA__) + wrteei(1); p9_cme_stop_exit(); // re-evaluate g_eimr_override then restore eimr p9_cme_stop_eval_eimr_override(); @@ -180,6 +181,7 @@ p9_cme_stop_spwu_handler(void* arg, PkIrqId irq) out32(CME_LCL_EIMR_OR, BITS32(12, 10)); PK_TRACE_INF("Launching exit thread"); #if defined(__IOTA__) + wrteei(1); p9_cme_stop_exit(); // re-evaluate g_eimr_override then restore eimr p9_cme_stop_eval_eimr_override(); @@ -202,6 +204,7 @@ p9_cme_stop_rgwu_handler(void* arg, PkIrqId irq) PK_TRACE_INF("RGWU Handler Trigger %d", irq); out32(CME_LCL_EIMR_OR, BITS32(12, 10)); #if defined(__IOTA__) + wrteei(1); p9_cme_stop_exit(); // re-evaluate g_eimr_override then restore eimr p9_cme_stop_eval_eimr_override(); @@ -219,6 +222,7 @@ p9_cme_stop_enter_handler(void* arg, PkIrqId irq) PK_TRACE_INF("PM_ACTIVE Handler Trigger %d", irq); out32(CME_LCL_EIMR_OR, BITS32(12, 10)); #if defined(__IOTA__) + wrteei(1); // The actual entry sequence p9_cme_stop_entry(); // re-evaluate g_eimr_override then restore eimr |
