diff options
| author | Rahul Batra <rbatra@us.ibm.com> | 2018-01-04 21:43:15 -0600 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-04-06 12:39:11 -0500 |
| commit | 5e7a5085043cfc42787069489663c9ba600038d3 (patch) | |
| tree | 8c56fed0686802472f0ed202f68a037c585d1f25 /import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c | |
| parent | 4a102688afb2cb3b815334145d4f7c8b84ab4017 (diff) | |
| download | talos-hcode-5e7a5085043cfc42787069489663c9ba600038d3.tar.gz talos-hcode-5e7a5085043cfc42787069489663c9ba600038d3.zip | |
PGPE: Error Handling Support
Key_Cronus_Test=PM_REGRESS
Change-Id: Ib6fb30d6b8c0cdc21002b34b708e724f54eac62b
Original-Change-Id: I00aca629108aeaca88db34eec8e408f3cd48ff7f
CQ: SW414842
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48635
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c | 21 |
1 files changed, 15 insertions, 6 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c index e64e6950..cf8bd2f4 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c @@ -25,6 +25,8 @@ #include "p9_cme_stop.h" #include "p9_cme_stop_enter_marks.h" +#include "qppm_register_addresses.h" +#include "qppm_firmware_registers.h" #include "p9_cme_irq.h" #include "p9_cme_pstate.h" @@ -171,6 +173,13 @@ p9_cme_stop_spwu_handler(void) // Core is now out of spwu, allow pm_active // block entry mode is handled via eimr override G_cme_stop_record.core_in_spwu &= ~core_mask; + + // if in block entry mode, do not release the mask + if (!(G_cme_stop_record.core_blockey & core_mask)) + { + // use 32 bit UPPER mask to prevent compiler from doing 64-bit shifting + g_eimr_override &= ((uint64_t)~((IRQ_VEC_STOP_C0_UPPER) >> core_index)) << 32 | 0xFFFFFFFF; + } } } } @@ -307,8 +316,9 @@ p9_cme_stop_db2_handler(void) #endif #endif // Finish handshake with SGPE for Stop11 via PIG - pig.fields.req_intr_type = PIG_TYPE5; - pig.fields.req_intr_payload = TYPE5_PAYLOAD_ENTRY_RCLK | STOP_LEVEL_11; + pig.fields.req_intr_type = PIG_TYPE0; + pig.fields.req_intr_payload = TYPE0_PAYLOAD_ENTRY_RCLK | STOP_LEVEL_11; + //CME_PUTSCOM_NOP(PPM_PIG, core_mask, pig.value); send_pig_packet(pig.value, core_mask); break; @@ -335,8 +345,9 @@ p9_cme_stop_db2_handler(void) #endif #endif // Finish handshake with SGPE for Stop11 via PIG - pig.fields.req_intr_type = PIG_TYPE5; - pig.fields.req_intr_payload = TYPE5_PAYLOAD_EXIT_RCLK; + pig.fields.req_intr_type = PIG_TYPE0; + pig.fields.req_intr_payload = TYPE0_PAYLOAD_EXIT_RCLK; + //CME_PUTSCOM_NOP(PPM_PIG, core_mask, pig.value); send_pig_packet(pig.value, core_mask); break; @@ -350,8 +361,6 @@ p9_cme_stop_db2_handler(void) p9_cme_stop_eval_eimr_override(); } - - void p9_cme_stop_db1_handler(void) { |
