Combined Stop/PState Cme Image + unified interrupt handler

Change-Id: Ie954197008f1a35bd8336c9d921f55165ec52207
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20857
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>

1 files changed, 28 insertions, 16 deletions

diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
index e929ff31..59b95954 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_irq_handlers.c
@@ -25,6 +25,7 @@
 
 #include "p9_cme_stop.h"
 #include "p9_cme_stop_enter_marks.h"
+#include "p9_cme_irq.h"
 
 extern CmeStopRecord G_cme_stop_record;
 
@@ -33,24 +34,34 @@ p9_cme_stop_event_handler(void* arg, PkIrqId irq)
 {
     MARK_TRAP(STOP_EVENT_HANDLER)
     PK_TRACE("SE-IRQ: %d", irq);
-
-    if (irq == IRQ_STOP_C0 || irq == IRQ_STOP_C1)
-    {
-        out32(CME_LCL_EIMR_OR, BITS32(20, 2));
-    }
-
-    if (irq >= IRQ_PC_C0 && irq <= IRQ_SWU_C1)
-    {
-        out32(CME_LCL_EIMR_OR, BITS32(12, 6));
-    }
-
     pk_semaphore_post((PkSemaphore*)arg);
+
+    // Important: g_eimr_override at any time should mask wakeup interrupts of
+    //            running core(s), the override vector should change after each
+    //            entry and exit as core state is changed.
+    // For Entry, mask the following interrupts via unified interrupt handler:
+    //   lower priority interrupts than pm_active, and both pm_active (catchup)
+    //   wakeup interrupts of the entering core(s) should still be masked
+    //   via g_eimr_override (abortion), stopped core can still exit any time
+    //   as their wakeup interrupts should be unmasked
+    // After Entry, unmask the following interrupts via pk_irq_vec_restore:
+    //   priority group on stack, likely at least both pm_active unmasked
+    //   (stopped core cannot get extra pm_active, untouched core can enter)
+    //   here needs to use g_eimr_override to mask wakeup of running core(s)
+    //   wakeup of the stopped core(s) should be already unmasked by default
+    //   (when restored, previous masked wakeups are being unmasked as well)
+    // For Exit, mask the following interrupts via unified interrupt handler:
+    //   lower priority interrupts than wakeup, including DB2+pm_active(catchup)
+    // After Exit, unmask the following interrupts via pk_irq_vec_restore:
+    //   priority group on stack, likely at least wakeup and DB2 unmasked
+    //   here needs to use g_eimr_override to mask wakeup of exited core(s)
 }
 
 void
 p9_cme_stop_doorbell_handler(void* arg, PkIrqId irq)
 {
-    int rc = 0;
+    int               rc = 0;
+    PkMachineContext  ctx;
     MARK_TRAP(STOP_DOORBELL_HANDLER)
     PK_TRACE("DB-IRQ: %d", irq);
 
@@ -60,15 +71,16 @@ p9_cme_stop_doorbell_handler(void* arg, PkIrqId irq)
     if (irq == IRQ_DB1_C0)
     {
         CME_PUTSCOM(CPPM_CMEDB1, CME_MASK_C0, 0);
-        out32(CME_LCL_EIMR_CLR, BIT32(12) | BIT32(14) | BIT32(16));
+        g_eimr_override &= ~IRQ_VEC_WAKE_C0;
+        //out32(CME_LCL_EIMR_CLR, BIT32(12) | BIT32(14) | BIT32(16));
     }
 
     if (irq == IRQ_DB1_C1)
     {
         CME_PUTSCOM(CPPM_CMEDB1, CME_MASK_C1, 0);
-        out32(CME_LCL_EIMR_CLR, BIT32(13) | BIT32(15) | BIT32(17));
+        g_eimr_override &= ~IRQ_VEC_WAKE_C1;
+        //out32(CME_LCL_EIMR_CLR, BIT32(13) | BIT32(15) | BIT32(17));
     }
 
-    //TODO mask pc_itr_pending as workaround for double interrupts of pc and rwu
-    out32(CME_LCL_EIMR_OR, BITS32(12, 2));
+    pk_irq_vec_restore(&ctx);
 }