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authorGreg Still <stillgs@us.ibm.com>2017-11-07 09:23:48 -0600
committerJoshua Hunsberger <jahunsbe@us.ibm.com>2017-11-17 14:55:57 -0600
commit42953975c749a36522ab1a42fa4619eed6fd16b4 (patch)
tree389dabc6461d7378996a6921c8bab7735365fbd6 /import/chips/p9/procedures/ppe_closed/cme/pstate_cme
parent267a2daa12c5dd2428e2d0005560bc58f460bbad (diff)
downloadtalos-hcode-42953975c749a36522ab1a42fa4619eed6fd16b4.tar.gz
talos-hcode-42953975c749a36522ab1a42fa4619eed6fd16b4.zip
PGPE/CME Hcode: Safe Pstate and STOP<>VDM Fixes
- Set OVERRIDE_PSAFE_PSTATE=0(use psafe from GPPB) (PGPE) - Make safe Pstate be lowest frequency limit (PGPE) - Uses POWERSAVE if the safe mode frequency is not set. Otherwise, uses the in the general clipping equation vs the safe computation (PGPE) - Use the correct jump field (L_S) for setting safe mode (split variables for better understanding (HWP) - Incorporate PGPE fix for registration doorbell acks as Safe Mode exacerbated a STOP 11 Quad Manager Registration timing window - Fix CME DB0 ack window upon before QM registration - Fix PGPE auto mode for Cronus - Put CME Pstate analog update and Next Pstate update in critical section to fix testing issues Key_Cronus_Test=PM_REGRESS Change-Id: I10388e288251d9915a5dc0b38a9424747524ea17 CQ: SW405402 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49372 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/pstate_cme')
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c21
1 files changed, 11 insertions, 10 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
index 9aa9aed8..22681fc9 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
@@ -427,14 +427,7 @@ inline void p9_cme_pstate_process_db0()
//Pmin or Pmax Update
else if(G_dbData.fields.cme_message_number0 == MSGID_DB0_CLIP_BROADCAST)
{
- //Process Clip Bcast only if Pstates are enabled.
- //Otherwise, ignore. The reason is PGPE multicasts Clip Bcast, and doorbell0
- //can be written while this CME is powered-off or about to be powered-off.
- //For Pstate Start and Stop PGPE only unicasts.
- if (G_cme_flags & BIT32(CME_FLAGS_PSTATES_ENABLED))
- {
- p9_cme_pstate_db0_clip_bcast();
- }
+ p9_cme_pstate_db0_clip_bcast();
}
//Otherwise, send an ERR ACK to PGPE and Halt
else
@@ -711,15 +704,17 @@ inline void p9_cme_pstate_freq_update()
inline void p9_cme_pstate_update_analog()
{
+
#ifdef USE_CME_RESCLK_FEATURE
PkMachineContext ctx;
+
uint32_t rescurr = (G_cme_flags & BIT32(CME_FLAGS_RCLK_OPERABLE))
? G_cme_pstate_record.resclkData.common_resclk_idx
: G_cme_pstate_record.quadPstate;
uint32_t resnext = (G_cme_flags & BIT32(CME_FLAGS_RCLK_OPERABLE))
? p9_cme_resclk_get_index(G_next_pstate)
: G_next_pstate;
-#endif//USE_CME_RESCLK_FEATURE
+#endif //USE_CME_RESCLK_FEATURE
#ifdef USE_CME_VDM_FEATURE
@@ -729,7 +724,7 @@ inline void p9_cme_pstate_update_analog()
p9_cme_vdm_update(G_next_pstate);
}
-#endif//USE_CME_VDM_FEATURE
+#endif //USE_CME_VDM_FEATURE
#ifdef USE_CME_RESCLK_FEATURE
@@ -777,6 +772,8 @@ inline void p9_cme_pstate_update_analog()
void p9_cme_pstate_update()
{
+ PkMachineContext ctx;
+
PK_TRACE_INF("DB_TH: Pstate Updt Enter");
G_next_pstate = (G_dbData.value >> (in32(CME_LCL_SRTCH0) &
@@ -800,10 +797,14 @@ void p9_cme_pstate_update()
PK_TRACE_INF("DB_TH: DBData=0x%08x%08x\n", G_dbData.value >> 32,
G_dbData.value);
+ pk_critical_section_enter(&ctx);
+
p9_cme_pstate_update_analog();
// Must update quadPstate before calling PMSR update
G_cme_pstate_record.quadPstate = G_next_pstate;
+
+ pk_critical_section_exit(&ctx);
}
p9_cme_pstate_pmsr_updt(G_cme_record.core_enabled);
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