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authorRahul Batra <rbatra@us.ibm.com>2018-04-13 14:07:27 -0500
committerhostboot <hostboot@us.ibm.com>2018-04-26 12:18:15 -0500
commit81a813f48222a440db09a500be91ca8704e5b899 (patch)
tree51e66646994787172f361769f216b4751b0ff78b /import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
parent1a22ed2d89ee46392d1122af3955c3f507a99e7c (diff)
downloadtalos-hcode-81a813f48222a440db09a500be91ca8704e5b899.tar.gz
talos-hcode-81a813f48222a440db09a500be91ca8704e5b899.zip
PM: Fixes for Livelock Scenarios
-Fixes DPLL Ownership issues during Pstate Start -Fixes WOF Enablement and Quad/Core Active Update(STOP11/5) livelock scenario -Fixes PM Complex Suspend and Quad/Core Active Update(STOP11/5) livelock scenario -Fixes VDM Droop Suspend STOP entries livelock scenario Key_Cronus_Test=PM_REGRESS Change-Id: I14a0dece4c74bc04618f7d1f3838dbe273bace94 CQ: SW425778 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57191 Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: YUE DU <daviddu@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c')
-rw-r--r--import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c45
1 files changed, 42 insertions, 3 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
index 97323138..a55194ee 100644
--- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
+++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c
@@ -39,7 +39,7 @@
#include "cmehw_interrupts.h"
#include "p9_cme_irq.h"
-#include "p9_cme_pstate.h"
+#include "p9_cme_stop.h"
#include "pstate_pgpe_cme_api.h"
#include "ppe42_cache.h"
#include "p9_hcode_image_defines.H"
@@ -51,6 +51,7 @@
//External Globals and globals
//
extern CmeRecord G_cme_record;
+extern CmeStopRecord G_cme_stop_record;
extern CmePstateRecord G_cme_pstate_record;
extern cmeHeader_t* G_cmeHeader;
extern LocalPstateParmBlock* G_lppb;
@@ -256,6 +257,43 @@ void p9_cme_pstate_db3_handler(void)
intercme_direct(INTERCME_DIRECT_IN2, INTERCME_DIRECT_ACK, 0);
}
}
+ else if (db3.fields.cme_message_numbern == MSGID_DB3_SUSPEND_STOP_ENTRY)
+ {
+ G_cme_stop_record.core_vdm_droop = CME_MASK_BC;
+
+ if (!(G_cme_stop_record.entry_ongoing ||
+ G_cme_stop_record.exit_ongoing))
+ {
+ p9_cme_stop_eval_eimr_override();
+ }
+
+ //Note: we don't ack back to PGPE. Instead, the STOP code will set the
+ //CME_FLAGS[SUSPEND_ENTRY] whenever it finishes any currently ongoing entry
+
+ }
+ else if (db3.fields.cme_message_numbern == MSGID_DB3_UNSUSPEND_STOP_ENTRY)
+ {
+ G_cme_stop_record.core_vdm_droop = 0;
+ p9_cme_stop_eval_eimr_override();
+
+ //Notify and Receive ack from sibling CME. This syncs up
+ //Quad Manager and Sibling before Quad Manager acks back to
+ //PGPE
+ if (G_cme_pstate_record.qmFlag)
+ {
+ p9_cme_pstate_notify_sib(INTERCME_DIRECT_IN2);
+ send_ack_to_pgpe(MSGID_PCB_TYPE4_UNSUSPEND_ENTRY_ACK);
+ }
+ else
+ {
+ //Wait to receive a notify from Quad Manager
+ //and then ACK back to quad manager
+ while(!(in32_sh(CME_LCL_EISR) & BIT64SH(39)));
+
+ intercme_direct(INTERCME_DIRECT_IN2, INTERCME_DIRECT_ACK, 0);
+ }
+
+ }
else
{
//\todo Will be done as part of 41947
@@ -265,6 +303,7 @@ void p9_cme_pstate_db3_handler(void)
PK_TRACE_INF("DB3 Handler Done ");
}
+
//
void p9_cme_pstate_init()
{
@@ -433,8 +472,8 @@ void p9_cme_pstate_init()
if (cme_flags & BIT32(CME_FLAGS_CORE0_GOOD))
{
- eimr_clr |= BIT64(11); //Enable DB3_0
- eimr_or |= BIT64(10); //Disable DB3_1
+ eimr_clr |= BIT64(10); //Enable DB3_0
+ eimr_or |= BIT64(11); //Disable DB3_1
}
else
{
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