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| author | Yue Du <daviddu@us.ibm.com> | 2016-04-26 12:27:02 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 16:05:52 -0500 |
| commit | d9d045421eb074827c7e18bc95d6d3961f7ed52e (patch) | |
| tree | f43f6ac4c44b0cf128c1d1623c97dd63e414fc5d /import/chips/p9/procedures/ppe_closed/cme/p9_cme_irq.h | |
| parent | b180ef27f824e88b37cc2e8b4e212f694dd251b7 (diff) | |
| download | talos-hcode-d9d045421eb074827c7e18bc95d6d3961f7ed52e.tar.gz talos-hcode-d9d045421eb074827c7e18bc95d6d3961f7ed52e.zip | |
CME/SGPE: Optimus Prime approves these upgrade of STOP images
Change-Id: I2486797c6614213418624427fd0d225e2792d15c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23684
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe_closed/cme/p9_cme_irq.h')
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/p9_cme_irq.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_irq.h b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_irq.h index e811e1d6..c7bc1c0a 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/p9_cme_irq.h +++ b/import/chips/p9/procedures/ppe_closed/cme/p9_cme_irq.h @@ -78,18 +78,18 @@ extern const uint64_t ext_irq_vectors_cme[NUM_EXT_IRQ_PRTY_LEVELS][2]; // Group0: Non-task hi-prty IRQs #define IRQ_VEC_PRTY0_CME (uint64_t)(0xFE00000000000000) -// Group1: DB3 + BCE -#define IRQ_VEC_PRTY1_CME (uint64_t)(0x00F0000000000000) -// Group2: DB2 + WAKEUP -#define IRQ_VEC_PRTY2_CME (uint64_t)(0x000FF00000000000) -// Group3: STOP -#define IRQ_VEC_PRTY3_CME (uint64_t)(0x00000C0000000000) +// Group1: DB3 +#define IRQ_VEC_PRTY1_CME (uint64_t)(0x0030000000000000) +// Group2: DB2 +#define IRQ_VEC_PRTY2_CME (uint64_t)(0x0000300000000000) +// Group3: WAKEUP + STOP +#define IRQ_VEC_PRTY3_CME (uint64_t)(0x000FCC0000000000) // Group4: DB1 #define IRQ_VEC_PRTY4_CME (uint64_t)(0x0000000000C00000) // Group5: BD0 + PMCR #define IRQ_VEC_PRTY5_CME (uint64_t)(0x000000003C000000) // Group6: We should never detect these -#define IRQ_VEC_PRTY6_CME (uint64_t)(0x010003FFC33FFFFF) +#define IRQ_VEC_PRTY6_CME (uint64_t)(0x01C003FFC33FFFFF) // This should be 0xFFFFFFFFFFFFFFFF #define IRQ_VEC_PRTY_CHECK ( IRQ_VEC_PRTY0_CME | \ |
