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author | Doug Gilbert <dgilbert@us.ibm.com> | 2017-05-25 11:54:42 -0500 |
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committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 17:44:40 -0500 |
commit | d697ff279dde0b010a0dd4b7463f62c8e58f33f1 (patch) | |
tree | e5ea57b001c7bb89250d706107453588bbd54c17 /import/chips/p9/procedures/ppe | |
parent | 619812e764473ffa1df44a4ae0a53dd57eeba2df (diff) | |
download | talos-hcode-d697ff279dde0b010a0dd4b7463f62c8e58f33f1.tar.gz talos-hcode-d697ff279dde0b010a0dd4b7463f62c8e58f33f1.zip |
PK pba_slvcntl buf_alloc fields not being set correctly
Change-Id: I5790f1620271ded42c2d7a4a1bac66b19fc3267a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40985
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sooraj R. Nair <soonair3@in.ibm.com>
Dev-Ready: Sooraj R. Nair <soonair3@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/ppe')
-rw-r--r-- | import/chips/p9/procedures/ppe/pk/gpe/gpe_pba_cntl.c | 42 |
1 files changed, 8 insertions, 34 deletions
diff --git a/import/chips/p9/procedures/ppe/pk/gpe/gpe_pba_cntl.c b/import/chips/p9/procedures/ppe/pk/gpe/gpe_pba_cntl.c index ec5b0836..5fa49d8e 100644 --- a/import/chips/p9/procedures/ppe/pk/gpe/gpe_pba_cntl.c +++ b/import/chips/p9/procedures/ppe/pk/gpe/gpe_pba_cntl.c @@ -51,7 +51,6 @@ #include "pba_firmware_registers.h" #include "gpe_pba_cntl.h" -#ifndef __PPE42__ #define PPE_LVD(_m_address, _m_data) \ asm volatile \ ( \ @@ -71,17 +70,12 @@ [address]"b"(_m_address) \ : "memory" \ ); -#endif // See gpe_pba_cntl.h for contract void gpe_pba_reset() { uint32_t slave = PBASLVCTLN; -#ifdef __PPE42__ - volatile uint64_t* pbaSlvrst = (uint64_t*)(PBA_SLVRST); -#else - uint64_t value64; -#endif + uint64_t value64 = 0; uint64_t val = 0; pba_slvrst_t slvrst; @@ -93,21 +87,13 @@ void gpe_pba_reset() do { -#ifdef __PPE42__ - *pbaSlvrst = slvrst.value; -#else value64 = slvrst.value; PPE_STVD(PBA_SLVRST, value64); -#endif val = rst_in_progress.value; -#ifdef __PPE42__ - val &= *pbaSlvrst; -#else PPE_LVD(PBA_SLVRST, value64); val &= value64; -#endif } while(val != 0); } @@ -120,12 +106,8 @@ void gpe_pba_slave_setup(uint32_t i_gpeInstanceId, uint32_t i_read_ttype, uint32_t i_buf_alloc) { - uint32_t slave = PBASLVCTLN; - // Only SLVCTL if it need to change -#ifdef __PPE42__ - volatile uint64_t* slvctl_reg = - (uint64_t*)((uint32_t)(PBA_SLVCTLN(slave))); -#endif + uint32_t slave = PBASLVCTLN; // gpe PBA_SLVCTL + uint64_t current = 0; pba_slvctln_t slvctln; @@ -138,29 +120,21 @@ void gpe_pba_slave_setup(uint32_t i_gpeInstanceId, // read prefetch - default 0, does it need param? slvctln.fields.read_prefetch_ctl = PBA_READ_PREFETCH_NONE; // slvctln.fields.buf_invalidate_ctl - leave 0 - slvctln.fields.buf_alloc_w = i_buf_alloc & PBA_BUF_W; - slvctln.fields.buf_alloc_a = i_buf_alloc & PBA_BUF_A; - slvctln.fields.buf_alloc_b = i_buf_alloc & PBA_BUF_B; - slvctln.fields.buf_alloc_c = i_buf_alloc & PBA_BUF_C; + slvctln.fields.buf_alloc_w = (i_buf_alloc & PBA_BUF_W) != 0; + slvctln.fields.buf_alloc_a = (i_buf_alloc & PBA_BUF_A) != 0; + slvctln.fields.buf_alloc_b = (i_buf_alloc & PBA_BUF_B) != 0; + slvctln.fields.buf_alloc_c = (i_buf_alloc & PBA_BUF_C) != 0; slvctln.fields.dis_write_gather = 1; slvctln.fields.wr_gather_timeout = PBA_WRITE_GATHER_TIMEOUT_2_PULSES; slvctln.fields.write_tsize = i_write_tsize; // slvctln.fields.extaddr = 0; PowerBus address bits (23:36) -#ifdef __PPE42__ - uint64_t current = *slvctl_reg; -#else - uint64_t current; + // Only write PBA_SLVCTL if it needs to change PPE_LVD(PBA_SLVCTLN(slave), current); -#endif if(slvctln.value != current) { gpe_pba_reset(); -#ifdef __PPE42__ - *slvctl_reg = slvctln.value; -#else PPE_STVD(PBA_SLVCTLN(slave), slvctln.value); -#endif } } |