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| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2018-09-09 23:22:11 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-09-26 10:45:06 -0500 |
| commit | d7e8d78835772e050c45a2f54a3cba643112d8ae (patch) | |
| tree | 8832b28d0b60991a8608f1536fda4322e957d37d /import/chips/p9/procedures/hwp/lib | |
| parent | c919d9d0b0a54f94f0ecac112129f11e8f255c57 (diff) | |
| download | talos-hcode-d7e8d78835772e050c45a2f54a3cba643112d8ae.tar.gz talos-hcode-d7e8d78835772e050c45a2f54a3cba643112d8ae.zip | |
Revert "UV Support : Augmented STOP API and self restore for enabling UV"
Change-Id: Iaabd787166422b68179901b7785ab3e8a54d35b8
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65875
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/hwp/lib')
| -rw-r--r-- | import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H | 24 |
1 files changed, 7 insertions, 17 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H index 356f6123..9b3c2ffd 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H +++ b/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H @@ -311,7 +311,6 @@ HCD_CONST(CPMR_ATTN_WORD1_BYTE, 0x04) HCD_CONST(CPMR_MAGIC_NUMBER_BYTE, 0x08) HCD_CONST(CPMR_BUILD_DATE_BYTE, 0x10) HCD_CONST(CPMR_BUILD_VER_BYTE, 0x14) -HCD_CONST(CPMR_URMOR_FIX_BYTE, 0x1E) HCD_CONST(CPMR_CME_HCODE_OFFSET_BYTE, 0x20) HCD_CONST(CPMR_CME_HCODE_LENGTH_BYTE, 0x24) HCD_CONST(CPMR_CORE_COMMON_RING_OFFSET_BYTE, 0x28) @@ -330,30 +329,21 @@ HCD_CONST(CPMR_MAX_SCOM_REST_PER_CORE_BYTE, 0x50) HCD_CONST(SELF_RESTORE_CPMR_OFFSET, CPMR_HEADER_SIZE) HCD_CONST(SELF_RESTORE_INT_SIZE, (8 * ONE_KB)) -HCD_CONST(THREAD_LAUNCHER_SIZE, 1024) +HCD_CONST(THREAD_LAUNCHER_SIZE, 256) HCD_CONST(SELF_RESTORE_CODE_SIZE, (SELF_RESTORE_INT_SIZE + THREAD_LAUNCHER_SIZE)) -HCD_CONST(CORE_RESTORE_THREAD_AREA_SIZE, HALF_KB) -HCD_CONST(SELF_SAVE_THREAD_AREA_SIZE, 256) -HCD_CONST(CORE_RESTORE_CORE_AREA_SIZE, HALF_KB) -HCD_CONST(CORE_SAVE_CORE_AREA_SIZE, HALF_KB) - -//self save-restore size per thread +HCD_CONST(CORE_RESTORE_THREAD_AREA_SIZE, (ONE_KB)) +HCD_CONST(CORE_RESTORE_CORE_AREA_SIZE, (ONE_KB)) HCD_CONST(CORE_RESTORE_SIZE_PER_THREAD, - (CORE_RESTORE_THREAD_AREA_SIZE + SELF_SAVE_THREAD_AREA_SIZE)) -//self save-restore size per core -HCD_CONST(SELF_RESTORE_SIZE_PER_CORE, - (CORE_RESTORE_SIZE_PER_THREAD + CORE_RESTORE_CORE_AREA_SIZE + - CORE_SAVE_CORE_AREA_SIZE)) -//size of self restore region for entire chip + (CORE_RESTORE_THREAD_AREA_SIZE + CORE_RESTORE_CORE_AREA_SIZE)) HCD_CONST(SELF_RESTORE_CORE_REGS_SIZE, - (SELF_RESTORE_SIZE_PER_CORE* MAX_CORES_PER_CHIP)) -//total self restore region including thread launcher code size + (CORE_RESTORE_SIZE_PER_THREAD* + MAX_THREADS_PER_CORE* MAX_CORES_PER_CHIP)) + HCD_CONST(SELF_RESTORE_SIZE_TOTAL, (SELF_RESTORE_CODE_SIZE + SELF_RESTORE_CORE_REGS_SIZE)) -HCD_CONST( EC_LEVEL_URMOR_FIX, 0x23 ) /// Core Scom |
