summaryrefslogtreecommitdiffstats
path: root/import/chips/p9/procedures/hwp/lib
diff options
context:
space:
mode:
authorRahul Batra <rbatra@us.ibm.com>2018-03-05 10:00:41 -0600
committerhostboot <hostboot@us.ibm.com>2018-04-06 12:39:19 -0500
commit6ebb5508cb11657cf867aadb8391d6be2ed60b73 (patch)
tree4a34784d5a23acd7fcbc20af1775926ab1327603 /import/chips/p9/procedures/hwp/lib
parent1fb69dc9f9a40980e40ac8f42bb5423f2829a22b (diff)
downloadtalos-hcode-6ebb5508cb11657cf867aadb8391d6be2ed60b73.tar.gz
talos-hcode-6ebb5508cb11657cf867aadb8391d6be2ed60b73.zip
PM: Generated Vratio/Vindex tables
Key_Cronus_Test=PM_REGRESS Change-Id: I3ecb8a4389c7b888c5323f2d8f013c3a17594cc5 Original-Change-Id: I9313dbe90771a549e14c8e90f2c2ca410616293a CQ: SW421682 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55059 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'import/chips/p9/procedures/hwp/lib')
-rw-r--r--import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H3
-rw-r--r--import/chips/p9/procedures/hwp/lib/p9_pstates_table.h62
2 files changed, 59 insertions, 6 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
index 5c70f5d0..37cc8354 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
+++ b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
@@ -631,8 +631,7 @@ typedef struct
uint8_t ppmr_reserved0[PGPE_IMAGE_RESERVE_SIZE];
uint8_t occParmBlock[sizeof(OCCPstateParmBlock)]; // PPMR + 128KB
uint8_t occParmBlockReserve[OCC_PSTATE_PARAM_BLOCK_REGION_SIZE - sizeof(OCCPstateParmBlock)];
- uint8_t pstateTable[sizeof(GeneratedPstateInfo)]; // PPMR + 144KB
- uint8_t pstateTableReserve[PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE - sizeof(GeneratedPstateInfo)];
+ uint8_t pstateTable[PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE]; // PPMR + 144KB
uint8_t ppmr_reserved1[WOF_TABLE_RESERVE];
uint8_t wofTableSize[OCC_WOF_TABLES_SIZE]; //WOF Tables located ar PPMR base + 768KB
} PPMRLayout_t;
diff --git a/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h b/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h
index b03de373..3056e749 100644
--- a/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h
+++ b/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
-/* COPYRIGHT 2015,2017 */
+/* COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -46,9 +46,11 @@
/// on the fly during Pstate protocol execution based on the Pstate Parameter
/// Block content.
-#define MAX_PSTATE_TABLE_ENTRIES 128
-#define GEN_PSTATES_TBL_MAGIC 0x50535441424c3030ULL //PSTABL00 (last two ASCII characters indicate version number)
-#define GEN_PSTATES_TBL_MAGIC_V1 0x50535441424c3031ULL //PSTABL01 (last two ASCII characters indicate version number)
+#define MAX_PSTATE_TABLE_ENTRIES 128
+#define MAX_VRATIO_VINDEX_TABLE_ENTRIES 299
+#define GEN_PSTATES_TBL_MAGIC 0x50535441424c3030ULL //PSTABL00 (last two ASCII characters indicate version number)
+#define GEN_PSTATES_TBL_MAGIC_V1 0x50535441424c3031ULL //PSTABL01 (last two ASCII characters indicate version number)
+#define GEN_PSTATES_TBL_MAGIC_V2 0x50535441424c3032ULL //PSTABL02 (last two ASCII characters indicate version number)
#ifndef __ASSEMBLER__
#ifdef __cplusplus
@@ -100,6 +102,11 @@ typedef struct
} PstateTable;
+typedef struct
+{
+ uint16_t vratio;
+ uint16_t vindex;
+} VRatioVIndexTable;
/// GeneratedPstateInfo - VERSION0
typedef struct
@@ -124,6 +131,7 @@ typedef struct
/// Note: if all bias attributes are 0, this content will be the same
/// as the raw_pstates content.
PstateTable biased_pstates[MAX_PSTATE_TABLE_ENTRIES];
+
} GeneratedPstateInfo;
@@ -167,6 +175,52 @@ typedef struct
PstateTable biased_pstates[MAX_PSTATE_TABLE_ENTRIES];
} GeneratedPstateInfo_v1;
+/// GeneratedPstateInfo - VERSION2
+typedef struct
+{
+ uint32_t gppb_offset;
+ uint32_t gppb_length;
+ uint32_t ps0_offset;
+ uint32_t highest_ps_offset;
+ uint32_t raw_pstate_tbl_offset;
+ uint32_t raw_pstate_tbl_length;
+ uint32_t biased_pstate_tbl_offset;
+ uint32_t biased_pstate_tbl_length;
+ uint32_t vratio_vindex_tbl_offset;
+ uint32_t vratio_vindex_tbl_length;
+} GeneratedPstateInfoHeader_v2;
+
+typedef struct
+{
+
+ /// Magic Number
+ uint64_t magic; // ASCII: "PSTABL02 "
+
+ /// Offset and lengths for fields of this structure
+ GeneratedPstateInfoHeader_v2 header;
+
+ // PGPE content
+ GlobalPstateParmBlock globalppb;
+
+ /// The fastest frequency - after biases have been applied
+ uint32_t pstate0_frequency_khz;
+
+ /// Highest Pstate Number => slowest Pstate generated
+ uint32_t highest_pstate;
+
+ /// Generated table with system paramters included but without biases
+ PstateTable raw_pstates[MAX_PSTATE_TABLE_ENTRIES];
+
+ /// Generated table with system paramters and biases
+ /// Note: if all bias attributes are 0, this content will be the same
+ /// as the raw_pstates content.
+ PstateTable biased_pstates[MAX_PSTATE_TABLE_ENTRIES];
+
+ ///Generate table with vratio and vindex for all
+ ///combinations of activeCores and sortCores
+ VRatioVIndexTable vratio_vindex[MAX_VRATIO_VINDEX_TABLE_ENTRIES];
+} GeneratedPstateInfo_v2;
+
#ifdef __cplusplus
} // end extern C
OpenPOWER on IntegriCloud