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author | Prem Shanker Jha <premjha2@in.ibm.com> | 2017-10-18 09:32:40 -0500 |
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committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2018-02-01 16:16:28 -0600 |
commit | a1423fe5535aabf6ba39f54a752ca141b7122612 (patch) | |
tree | bf3b715055125cf7b1e0a46410cab34182c62ba9 /import/chips/p9/common | |
parent | 4d2be5bb0c7859fe4212b6b6e3464ecb7966438c (diff) | |
download | talos-hcode-a1423fe5535aabf6ba39f54a752ca141b7122612.tar.gz talos-hcode-a1423fe5535aabf6ba39f54a752ca141b7122612.zip |
Hcode Injection: Adds hcode error injection capability.
Commit adds error injection capability in the hcode of CME,
SGPE and PGPE.
- CME reads CSAR[30|31] and if asserted traps
- SGPE reads OCC Flag2[30] and if asserted traps
- PGPE reads OCC Flag2[31] and if asserted traps
Change-Id: I4b579e521ec68c8aee624f3955b095b55d8bfdde
Original-Change-Id: Ia8476076ce4953ced4eda30927bd891481b0373c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48920
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Diffstat (limited to 'import/chips/p9/common')
3 files changed, 19 insertions, 4 deletions
diff --git a/import/chips/p9/common/pmlib/include/cmehw_common.h b/import/chips/p9/common/pmlib/include/cmehw_common.h index b9587521..76517870 100644 --- a/import/chips/p9/common/pmlib/include/cmehw_common.h +++ b/import/chips/p9/common/pmlib/include/cmehw_common.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HCODE Project */ /* */ -/* COPYRIGHT 2015,2017 */ +/* COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -57,6 +57,12 @@ enum CME_BCEBAR_INDEXES CME_BCEBAR_1 = 1 }; +enum CME_ERR_INJ_BIT_POS +{ + CME_PSTATE_HCODE_ERR_INJ_BIT = 0x00000002, + CME_STOP_HCODE_ERR_INJ_BIT = 0x00000001, +}; + #define CME_SCOM_ADDR(addr, core, op) (addr | (core << 22) | (op << 20)) // cme getscom default with 'eq' op diff --git a/import/chips/p9/common/pmlib/include/gpehw_common.h b/import/chips/p9/common/pmlib/include/gpehw_common.h index 5aa837a8..4ddd764e 100644 --- a/import/chips/p9/common/pmlib/include/gpehw_common.h +++ b/import/chips/p9/common/pmlib/include/gpehw_common.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HCODE Project */ /* */ -/* COPYRIGHT 2015,2017 */ +/* COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -77,6 +77,12 @@ enum GPE_SCOM_ADDRESS_PARAMETERS CME1_ADDR_OFFSET = 0x00000400 }; +enum GPE_ERR_INJ_BIT_POS +{ + SGPE_HCODE_ERR_INJ_BIT = 0x00000002, + PGPE_HCODE_ERR_INJ_BIT = 0x00000001, +}; + /// GPE SCOM #define GPE_SCOM_ADDR(addr, cplt_base, cq_offset, ex_select) \ diff --git a/import/chips/p9/common/pmlib/include/registers/ocb_register_addresses.h b/import/chips/p9/common/pmlib/include/registers/ocb_register_addresses.h index 98989be7..8b236d36 100644 --- a/import/chips/p9/common/pmlib/include/registers/ocb_register_addresses.h +++ b/import/chips/p9/common/pmlib/include/registers/ocb_register_addresses.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HCODE Project */ /* */ -/* COPYRIGHT 2015,2017 */ +/* COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -105,6 +105,9 @@ #define OCB_OCCFLG_CLR 0xc0060458 #define OCB_OCCFLG_OR 0xc0060460 #define OCB_OCCHBR 0xc0060478 +#define OCB_OCCFLG2 0xc0060c50 +#define OCB_OCCFLG2_CLR 0xc0060c58 +#define OCB_OCCFLG2_OR 0xc0060c60 #define OCB_CCSR 0xc0060480 #define OCB_CCSR_CLR 0xc0060488 #define OCB_CCSR_OR 0xc0060490 @@ -457,6 +460,6 @@ #define OCB_OCCLFIRACT0 0x01010806 #define OCB_OCCLFIRACT1 0x01010807 #define OCB_OCCLFIRWOF 0x01010808 -#define OCB_OCCERRRPT 0x0101080a +#define OCB_OCCERRRPT 0x0101080a #endif // __OCB_REGISTER_ADDRESSES_H__ |