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| author | Michael Floyd <mfloyd@us.ibm.com> | 2018-02-05 10:30:38 -0600 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-03-22 14:04:47 -0500 |
| commit | e64998e53cc020528cfe7ea9cf8fd61f82de341e (patch) | |
| tree | 73d0f99148118458ce9348f777de905b9ae2d2f7 | |
| parent | 234774b58a2a1045e916697b13e1b5360c35c2fa (diff) | |
| download | talos-hcode-e64998e53cc020528cfe7ea9cf8fd61f82de341e.tar.gz talos-hcode-e64998e53cc020528cfe7ea9cf8fd61f82de341e.zip | |
CME Code Size Reduction ATTEMPT#3
-- some IOTA kernel cleanup
-- also add checking for IOTA execution stack overflow
-- re-coded to eliminate some math library macro usage
-- added native 16-bit multiply
-- re-coded to remove redundancy from external interrupt handler
-- removed dec handler (optional define) and other minor cleanup
-- fixed Interrupt initialization code in std_init (all PPE images)
-- always inline pstate_db0_clip_bcast & update_vdm_jump_values_in_dpll
-- optimized pls calculation code
-- optimized pstate init, db1 handler, core good handling
-- optimized pmcr requests and pmsr updates (always write for both cores)
Key_Cronus_Test=PM_REGRESS
Change-Id: I50b6903f520c7bc78975e487a5072fecb06e1b55
Original-Change-Id: If48fec5832bd5e46cb89f0d6a97d90a488e8ff7b
CQ: SW415503
RTC: 178789
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53381
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: YUE DU <daviddu@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c index b7ce7885..f14bca9b 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_exit.c @@ -887,20 +887,24 @@ p9_cme_stop_exit() } + /************** + // Remove STOP3 - if (deeper_level == STOP_LEVEL_3 || target_level == STOP_LEVEL_3) - { - //-------------------------------------------------------------------------- - PK_TRACE("+++++ +++++ STOP LEVEL 3 EXIT +++++ +++++"); - //-------------------------------------------------------------------------- + if (deeper_level == STOP_LEVEL_3 || target_level == STOP_LEVEL_3) + { + //-------------------------------------------------------------------------- + PK_TRACE("+++++ +++++ STOP LEVEL 3 EXIT +++++ +++++"); + //-------------------------------------------------------------------------- - //====================== - MARK_TAG(SX_STOP3, core) - //====================== + //====================== + MARK_TAG(SX_STOP3, core) + //====================== - PK_TRACE_DBG("SX.3A: Core[%d] Return to Full Voltage", core); - //disable ivrm? - } + PK_TRACE_DBG("SX.3A: Core[%d] Return to Full Voltage", core); + //disable ivrm? + } + // Remove STOP3 + ***************/ p9_cme_stop_exit_lv2(core); @@ -964,7 +968,7 @@ p9_cme_stop_exit() return; } - p9_cme_pstate_pmsr_updt(core); + p9_cme_pstate_pmsr_updt(); //============================== MARK_TAG(SX_RUNTIME_INITS, core) |
