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author | Prem Shanker Jha <premjha2@in.ibm.com> | 2018-09-17 06:18:37 -0500 |
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committer | hostboot <hostboot@us.ibm.com> | 2018-10-27 10:36:38 -0500 |
commit | df7b1f86b42188af0c748b705aa25140c04eeb92 (patch) | |
tree | c082f1ab0437bbee3958c71ff327b00a87636949 | |
parent | 690b5374a33a24ca012beb90aac8d892dc5b9e47 (diff) | |
download | talos-hcode-df7b1f86b42188af0c748b705aa25140c04eeb92.tar.gz talos-hcode-df7b1f86b42188af0c748b705aa25140c04eeb92.zip |
Img Build: HOMER changes for SMF and SPR self save.
Commit conditionnally creates a new self restore region
memory layout. It also adds support for self save of SPR.
HWP detects the version of self restore code loaded and
based on that it retains legacy self restore layout or
the new layout.
Key_Cronus_Test=PM_REGRESS
Change-Id: I0a9723870e63b1dd70c8163cc6a13c35d9cb78ca
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66218
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
-rw-r--r-- | import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H index fa162df8..f81c6817 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H +++ b/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H @@ -137,7 +137,10 @@ HCD_HDR_ATTN ( attnOpcodes, 2); HCD_HDR_UINT64( magic_number, CPMR_MAGIC_NUMBER); HCD_HDR_UINT32( cpmrbuildDate, 0); HCD_HDR_UINT32( cpmrVersion, 0); -HCD_HDR_UINT8_VEC (cpmrReserveFlags, 7, 0); +HCD_HDR_UINT8_VEC (cpmrReserveFlags, 4, 0); +HCD_HDR_UINT8 ( selfRestoreVer, 0); +HCD_HDR_UINT8 ( stopApiVer, 0); +HCD_HDR_UINT8 ( urmorFix, 0); HCD_HDR_UINT8 ( fusedModeStatus, 0); HCD_HDR_UINT32( cmeImgOffset, 0); HCD_HDR_UINT32( cmeImgLength, 0); @@ -596,11 +599,11 @@ typedef struct typedef union CPMRSelfRestoreLayout { - uint8_t region[SELF_RESTORE_CODE_SIZE]; + uint8_t region[SMF_SELF_RESTORE_CODE_SIZE]; struct { cpmrHeader_t CPMRHeader; - uint8_t exe[SELF_RESTORE_CODE_SIZE - sizeof(cpmrHeader_t)]; + uint8_t exe[SMF_SELF_RESTORE_CODE_SIZE - sizeof(cpmrHeader_t)]; } elements; } CPMRSelfRestoreLayout_t; @@ -610,8 +613,8 @@ typedef union CPMRSelfRestoreLayout typedef struct { CPMRSelfRestoreLayout_t CPMR_SR; - uint8_t coreSelfRestore[SELF_RESTORE_CORE_REGS_SIZE]; - uint8_t reserve[CORE_SCOM_RESTORE_CPMR_OFFSET - SELF_RESTORE_SIZE_TOTAL]; + uint8_t coreSelfRestore[SMF_SELF_RESTORE_CORE_REGS_SIZE]; + uint8_t reserve[CORE_SCOM_RESTORE_CPMR_OFFSET - SMF_SELF_RESTORE_SIZE_TOTAL]; uint8_t coreScom[CORE_SCOM_RESTORE_SIZE_TOTAL]; } SelfRestoreLayout_t; |