diff options
author | Adam Hale <adam.samuel.hale@ibm.com> | 2017-08-24 11:05:56 -0500 |
---|---|---|
committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 19:17:29 -0500 |
commit | df6d61d427150228a709902965c7e0151e533371 (patch) | |
tree | 2b2a3e025cd3378f91dadd7b1b454cd4ab4606ef | |
parent | 0aa4355adf0c15357210a7d9d719f706b2b16eb3 (diff) | |
download | talos-hcode-df6d61d427150228a709902965c7e0151e533371.tar.gz talos-hcode-df6d61d427150228a709902965c7e0151e533371.zip |
PGPE: PGPE Op Trace updates
-Added entry/exit demarcation for core/quad changes
-Fixed ordering of ACK/PRC trace stmt.
-Added Unexpected errors and panic tracing
Change-Id: Ic293d2c907f4bbdc5805ab0d96a47b1582d2b27d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45112
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
11 files changed, 338 insertions, 166 deletions
diff --git a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h index a18b2d20..7c36294f 100644 --- a/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h +++ b/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h @@ -181,7 +181,10 @@ enum PM_GPE_OCC_SCRATCH2_DEFS CME_DEBUG_TRAP_ENABLE = 9, PGPE_DEBUG_TRAP_ENABLE = 10, L3_CONTAINED_MODE = 11, - PGPE_SAFE_MODE_ERROR = 12 + PGPE_SAFE_MODE_ERROR = 12, + PGPE_OP_TRACE_DISABLE = 24, + PGPE_OP_TRACE_MEM_MODE_START = 25, + PGPE_OP_TRACE_MEM_MODE_LENGTH = 2 }; // diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/avs_driver.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/avs_driver.c index 5d6e67fe..3d5f3990 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/avs_driver.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/avs_driver.c @@ -36,10 +36,13 @@ #include "pk.h" #include "avs_driver.h" #include "p9_pgpe_gppb.h" +#include "p9_pgpe.h" +#include "p9_pgpe_optrace.h" #define CLOCK_SPIVID_MHZ 10 //\todo determine if this should come from attribute extern GlobalPstateParmBlock* G_gppb; +extern TraceData_t G_pgpe_optrace_data; //################################################################################################# // Function which generates a 3 bit CRC value for 29 bit data @@ -211,7 +214,7 @@ uint8_t driveRead(uint32_t CmdDataType, uint32_t* CmdData) if (rc) { PK_TRACE_ERR("AVS_READ: OnGoingFlag timeout"); - PK_PANIC(PGPE_AVS_READ_ONGOING_FLAG_TIMEOUT); + PGPE_PANIC_AND_TRACE(PGPE_AVS_READ_ONGOING_FLAG_TIMEOUT); } // Read returned voltage value from Read frame @@ -285,7 +288,7 @@ void external_voltage_control_init(uint32_t* vext_read_mv) if (rc) { PK_TRACE_ERR("AVS_INIT: DriveIdleFrame FAIL"); - PK_PANIC(PGPE_AVS_INIT_DRIVE_IDLE_FRAME); + PGPE_PANIC_AND_TRACE(PGPE_AVS_INIT_DRIVE_IDLE_FRAME); } // Drive read transaction to return initial setting of rail voltage and wait on o2s_ongoing=0 @@ -294,7 +297,7 @@ void external_voltage_control_init(uint32_t* vext_read_mv) if (rc) { PK_TRACE_ERR("AVS_INIT: DriveRead FAIL"); - PK_PANIC(PGPE_AVS_INIT_DRIVE_READ); + PGPE_PANIC_AND_TRACE(PGPE_AVS_INIT_DRIVE_READ); } *vext_read_mv = CmdDataRead; @@ -313,7 +316,7 @@ void external_voltage_control_write(uint32_t vext_write_mv) if (vext_write_mv > AVS_DRIVER_MAX_EXTERNAL_VOLTAGE || vext_write_mv < AVS_DRIVER_MIN_EXTERNAL_VOLTAGE) { - PK_PANIC(PGPE_VOLTAGE_OUT_OF_BOUNDS); + PGPE_PANIC_AND_TRACE(PGPE_VOLTAGE_OUT_OF_BOUNDS); } // Drive write transaction with a target voltage on a particular rail and wait on o2s_ongoing=0 @@ -322,7 +325,7 @@ void external_voltage_control_write(uint32_t vext_write_mv) if (rc) { PK_TRACE_ERR("AVS_WRITE: Drive Write FAIL"); - PK_PANIC(PGPE_AVS_WRITE_DRIVE_WRITE); + PGPE_PANIC_AND_TRACE(PGPE_AVS_WRITE_DRIVE_WRITE); } #if !EPM_P9_TUNING @@ -333,13 +336,13 @@ void external_voltage_control_write(uint32_t vext_write_mv) if (rc) { PK_TRACE_ERR("AVS_WRITE: Drive Read FAIL"); - PK_PANIC(PGPE_AVS_WRITE_DRIVE_READ); + PGPE_PANIC_AND_TRACE(PGPE_AVS_WRITE_DRIVE_READ); } if (CmdDataRead != vext_write_mv) { PK_TRACE_ERR("AVS_WRITE: Miscompare, Read=%dmV != Write=%dmV", CmdDataRead, vext_write_mv); - PK_PANIC(PGPE_AVS_WRITE_RW_MISCOMPARE); + PGPE_PANIC_AND_TRACE(PGPE_AVS_WRITE_RW_MISCOMPARE); } #endif diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe.h index ed42780c..4a019361 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe.h +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe.h @@ -88,6 +88,11 @@ enum PSTATE_START_SOURCE #define LAST_CORE_FROM_QUAD(quad) \ ((quad + 1) << 2) +#define PGPE_PANIC_AND_TRACE(val)\ + G_pgpe_optrace_data.word[0] = val; \ + p9_pgpe_optrace(HALT_CONDITION ); \ + PK_PANIC(val); + /// PGPE PState void p9_pgpe_irq_handler_occ_error(void* arg, PkIrqId irq); void p9_pgpe_irq_handler_sgpe_halt(void* arg, PkIrqId irq); diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c index bd4ae9b2..8158c8e4 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_ipc_handlers.c @@ -46,6 +46,7 @@ // extern PgpeHeader_t* G_pgpe_header_data; extern PgpePstateRecord G_pgpe_pstate_record; +extern TraceData_t G_pgpe_optrace_data; // //p9_pgpe_ipc_init @@ -102,7 +103,8 @@ void p9_pgpe_ipc_405_start_stop(ipc_msg_t* cmd, void* arg) { args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_START_STOP); + G_pgpe_optrace_data.word[0] = PGPE_OP_PSTATE_START_STOP_WHILE_PENDING; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } @@ -127,7 +129,8 @@ void p9_pgpe_ipc_405_clips(ipc_msg_t* cmd, void* arg) { args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_CLIP_UPDT); + G_pgpe_optrace_data.word[0] = PGPE_OP_CLIP_UPDT_IN_WHILE_PENDING; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } @@ -153,6 +156,8 @@ void p9_pgpe_ipc_405_set_pmcr(ipc_msg_t* cmd, void* arg) PK_TRACE_DBG("IPC: Set PMCR while pending"); args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); + G_pgpe_optrace_data.word[0] = PGPE_OP_SET_PMCR_WHILE_PENDING; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } @@ -177,7 +182,8 @@ void p9_pgpe_ipc_405_wof_control(ipc_msg_t* cmd, void* arg) { args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_WOF_CTRL); + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_CTRL_WHILE_PENDING; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } @@ -202,7 +208,8 @@ void p9_pgpe_ipc_405_wof_vfrt(ipc_msg_t* cmd, void* arg) { args->msg_cb.rc = PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_WOF_VFRT); + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_VFRT_WHILE_PENDING; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } @@ -229,7 +236,8 @@ void p9_pgpe_ipc_sgpe_updt_active_cores(ipc_msg_t* cmd, void* arg) (ipcmsg_s2p_update_active_cores_t*)async_cmd->cmd_data; args->fields.return_code = IPC_SGPE_PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_CORES_ACTV); + G_pgpe_optrace_data.word[0] = PGPE_OP_CORES_ACTIVE_WHILE_PENDING; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } @@ -259,7 +267,8 @@ void p9_pgpe_ipc_sgpe_updt_active_quads(ipc_msg_t* cmd, void* arg) (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; args->fields.return_code = IPC_SGPE_PGPE_RC_REQ_WHILE_PENDING_ACK; ipc_send_rsp(cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_QUAD_ACTV); + G_pgpe_optrace_data.word[0] = PGPE_OP_QUADS_ACTIVE_WHILE_PENDING; + p9_pgpe_optrace(UNEXPECTED_ERROR); PK_TRACE_INF("IPC: Updt Quads while pending"); } } diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.c index abd35297..811b998a 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq.c @@ -35,6 +35,10 @@ #include "pk.h" #include "p9_pgpe_irq.h" #include "ppehw_common.h" +#include "p9_pgpe_optrace.h" +#include "p9_pgpe.h" + +extern TraceData_t G_pgpe_optrace_data; // Notes: // - The following two lists, ext_irq_vectors_gpe[][] and IDX_PRTY_LVL_<task_abbr>, @@ -139,9 +143,11 @@ void pk_unified_irq_prty_mask_handler(void) { PK_TRACE_ERR("A Phantom IRQ fired, ext_irq_vector_pk=0x%08x%08x", UPPER32(ext_irq_vector_pk), LOWER32(ext_irq_vector_pk)); - PK_PANIC(PGPE_UIH_EIMR_STACK_OVERFLOW); + PGPE_PANIC_AND_TRACE(PGPE_UIH_EIMR_STACK_OVERFLOW); } + PK_TRACE_DBG("IRQ SET: prty_lvl=%d, g_oimr_stack_ctr=0x%x", g_current_prty_level, g_oimr_stack_ctr); + // 3. Return the priority vector in d5 and let hwmacro_get_ext_irq do the // rest, i.e. route first found IRQ in the returned priority vector // to the registered [unified] interrupt handler. @@ -152,6 +158,8 @@ void pk_unified_irq_prty_mask_handler(void) : [data]"=r"(l_vecH) \ : [addr]"r"(&ext_irq_vectors_gpe[iPrtyLvl][IDX_PRTY_VEC]) ); + //WARNING: Don't add any code here. We are passing values in r5 and r6, and they can be + //overwritten by any compiler generated code } // @@ -177,7 +185,7 @@ void pk_irq_save_and_set_mask(uint32_t iPrtyLvl) { PK_TRACE_ERR("Code bug: OIMR S/R stack counter=%d >= max=%d.", g_oimr_stack_ctr, NUM_EXT_IRQ_PRTY_LEVELS); - PK_PANIC(PGPE_UIH_EIMR_STACK_OVERFLOW); + PGPE_PANIC_AND_TRACE(PGPE_UIH_EIMR_STACK_OVERFLOW); } // Write the new mask for this priority level. diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c index 12643654..443b566e 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_irq_handlers.c @@ -114,7 +114,7 @@ void p9_pgpe_irq_handler_xstop_gpe2(void* arg, PkIrqId irq) PK_TRACE_DBG("XSTOP GPE2: Enter"); PkMachineContext ctx; - PK_PANIC(PGPE_XSTOP_SGPE_IRQ); + PGPE_PANIC_AND_TRACE(PGPE_XSTOP_SGPE_IRQ); pk_irq_vec_restore(&ctx);//Restore interrupts PK_TRACE_DBG("XSTOP GPE2: Exit"); @@ -152,11 +152,11 @@ void p9_pgpe_irq_handler_pcb_type1(void* arg, PkIrqId irq) opit1cn.value = in32(OCB_OPIT1CN(c)); //Extract the LowerPState field and store the Pstate request + //RTC:177526 GA1 only Phase1 data is used since only LowerPS fields is supported in PMCR G_pgpe_pstate_record.coresPSRequest[c] = opit1cn.value & 0xff; PK_TRACE_DBG("PCB1: c[%d]=0%x", c, G_pgpe_pstate_record.coresPSRequest[c]); - G_pgpe_optrace_data.word[0] = (c << 24) | (G_pgpe_pstate_record.globalPSComputed << 16) | + G_pgpe_optrace_data.word[0] = (c << 24) | (G_pgpe_pstate_record.globalPSCurr << 16) | G_pgpe_pstate_record.coresPSRequest[c]; - //RTC:177526 GA1 only Phase1 data is used since only LowerPS fields is supported in PMCR p9_pgpe_optrace(PRC_PCB_T1); } } @@ -165,6 +165,11 @@ void p9_pgpe_irq_handler_pcb_type1(void* arg, PkIrqId irq) p9_pgpe_pstate_do_auction(); p9_pgpe_pstate_apply_clips(); } + else + { + G_pgpe_optrace_data.word[0] = PGPE_OP_PCB_TYPE1_IN_PSTATE_STOPPED; + p9_pgpe_optrace(UNEXPECTED_ERROR); + } #if SIMICS_TUNING out32(OCB_OPIT1PRA, 0x00000000); //Clear out pending bits @@ -216,7 +221,7 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq) if (G_pgpe_pstate_record.activeQuads & QUAD_MASK(q)) { PK_TRACE_DBG("PCB4: Quad %d Already Registered. opit4pra=0x%x", q, opit4pr); - PK_PANIC(PGPE_CME_UNEXPECTED_REGISTRATION); + PGPE_PANIC_AND_TRACE(PGPE_CME_UNEXPECTED_REGISTRATION); } //Update activeQuads and coresActive @@ -310,7 +315,7 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq) quadAckExpect |= QUAD_MASK(q); } - G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.globalPSComputed << 16) + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.globalPSCurr << 16) | (in32(OCB_QCSR) >> 16); p9_pgpe_optrace(PRC_PCB_T4); } @@ -348,7 +353,7 @@ void p9_pgpe_irq_handler_pcb_type4(void* arg, PkIrqId irq) else if(!(G_pgpe_pstate_record.pendQuadsRegistration & QUAD_MASK(q))) { PK_TRACE_ERR("PCB4: Unexpected ACK q=0x%x,opit4prQuad=0x%x", q, opit4prQuad); - PK_PANIC(PGPE_CME_UNEXPECTED_REGISTRATION); + PGPE_PANIC_AND_TRACE(PGPE_CME_UNEXPECTED_REGISTRATION); } } } diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c index 7b11f4e9..aa016191 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_main.c @@ -30,6 +30,8 @@ #include "p9_pgpe_pstate.h" #include "p9_pgpe_optrace.h" +extern TraceData_t G_pgpe_optrace_data; + PgpePstateRecord G_pgpe_pstate_record __attribute__((section (".dump_ptrs"))) = { 0, @@ -170,7 +172,7 @@ main(int argc, char** argv) if(mfspr(287) != PVR_CONST) { - PK_PANIC(PGPE_BAD_DD_LEVEL); + PGPE_PANIC_AND_TRACE(PGPE_BAD_DD_LEVEL); } // Initializes kernel data (stack, threads, timebase, timers, etc.) diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c index 2146e61e..0e52c175 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.c @@ -50,7 +50,7 @@ void p9_pgpe_optrace_init() //sets up address and initializes buffer to 0's } void p9_pgpe_optrace(uint32_t mark) { - if(in32(OCB_OCCS2) & PGPE_OPTRACE_DISABLE) //Check to see if tracing is enabled + if(in32(OCB_OCCS2) & PGPE_OP_TRACE_DISABLE) //Check to see if tracing is enabled { G_lastDisable = 1; } diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h index 56000dfd..c836509a 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_optrace.h @@ -25,42 +25,90 @@ #ifndef _P9_PGPE_TRACE_HEADER_ #define _P9_PGPE_TRACE_HEADER_ -#define PGPE_OPTRACE_DISABLE 0x00000080 -#define START_STOP_IPC 0 -#define START_STOP_FLAG 1 +enum PGPE_OP_TRACE +{ + START_STOP_IPC = 0, + START_STOP_FLAG = 1, -#define WOF_CALC_DONE 0x11 -#define AUCTION_DONE 0x10 -#define ACTUATE_STEP_DONE 0x73 + //Without Timestamps + WOF_CALC_DONE = 0x11, + AUCTION_DONE = 0x10, -#define ACK_WOF_VFRT 0xC2 -#define ACK_WOF_CTRL 0xC4 -#define ACTL_BROADCAST 0xC5 -#define ACK_ACTL_DONE 0xC6 -#define ACK_CLIP_UPDT 0xC7 -#define ACK_START_STOP 0xC8 -#define RESERVED_TS_0 0xC9 -#define ACK_CORES_ACTV 0xCA -#define ACK_QUAD_ACTV 0xCB -#define ACK_START_TRACE 0xCC -#define INV_TRC_REQ 0xCD -#define ACK_PM_SUSP 0xCE -#define ACK_SAFE_DONE 0xCF + //ACKs + RESERVED_TS0 = 0xC0, + RESERVED_TS1 = 0xC1, + ACK_WOF_VFRT = 0xC2, + RESERVED_TS3 = 0xC3, + ACK_WOF_CTRL = 0xC4, + ACTL_BROADCAST = 0xC5, + ACK_ACTL_DONE = 0xC6, + ACK_CLIP_UPDT = 0xC7, + ACK_START_STOP = 0xC8, + RESERVED_TS9 = 0xC9, + ACK_CORES_ACTV = 0xCA, + ACK_QUAD_ACTV = 0xCB, + ACK_START_TRACE = 0xCC, + INV_TRC_REQ = 0xCD, + ACK_PM_SUSP = 0xCE, + ACK_SAFE_DONE = 0xCF, -#define PRC_WOF_VFRT 0x62 -#define PRC_WOF_CTRL 0x54 -#define PRC_PCB_T4 0x55 -#define PRC_PCB_T1 0x56 -#define PRC_CLIP_UPDT 0x77 -#define PRC_START_STOP 0x58 -#define PRC_SET_PMCR 0x69 -#define PRC_CORES_ACTV 0x5A -#define PRC_QUAD_ACTV 0x5B -#define FIT_TB_SYNC 0x5C -#define SGPE_SUSP_DONE 0x4D -#define PRC_PM_SUSP 0x4E -#define PRC_SAFE_MODE 0x5F + //Process + HALT_CONDITION = 0x50, + UNEXPECTED_ERROR = 0x51, + PRC_WOF_VFRT = 0x62, + ACTUATE_STEP_DONE = 0x73, + PRC_WOF_CTRL = 0x54, + PRC_PCB_T4 = 0x55, + PRC_PCB_T1 = 0x56, + PRC_CLIP_UPDT = 0x77, + PRC_START_STOP = 0x58, + PRC_SET_PMCR = 0x69, + PRC_CORES_ACTV = 0x5A, + PRC_QUAD_ACTV = 0x5B, + FIT_TB_SYNC = 0x5C, + SGPE_SUSP_DONE = 0x4D, + PRC_PM_SUSP = 0x4E, + PRC_SAFE_MODE = 0x5F +}; +//Unexpected Errors +enum PGPE_OP_TRACE_UNEXPECTED_ERRORS +{ + PGPE_OP_WOF_VFRT_IN_SAFE_MODE = 0x01, + PGPE_OP_WOF_VFRT_IN_PM_SUSP = 0x02, + PGPE_OP_WOF_VFRT_IN_PSTATE_STOPPED = 0x03, + PGPE_OP_WOF_VFRT_WHILE_PENDING = 0x04, + PGPE_OP_WOF_CTRL_IN_SAFE_MODE = 0x08, + PGPE_OP_WOF_CTRL_IN_PM_SUSP = 0x09, + PGPE_OP_WOF_CTRL_IN_PSTATE_STOPPED = 0x0a, + PGPE_OP_WOF_CTRL_ENABLE_WHEN_ENABLED = 0x0b, + PGPE_OP_WOF_CTRL_DISABLE_WHEN_DISABLED = 0x0c, + PGPE_OP_WOF_CTRL_WHILE_PENDING = 0x0d, + PGPE_OP_CLIP_UPDT_IN_SAFE_MODE = 0x10, + PGPE_OP_CLIP_UPDT_IN_PM_SUSP = 0x11, + PGPE_OP_CLIP_UPDT_IN_WHILE_PENDING = 0x12, + PGPE_OP_PSTATE_START_IN_SAFE_MODE = 0x20, + PGPE_OP_PSTATE_START_IN_PM_SUSP = 0x21, + PGPE_OP_PSTATE_STOP_IN_SAFE_MODE = 0x23, + PGPE_OP_PSTATE_STOP_IN_PM_SUSP = 0x24, + PGPE_OP_PSTATE_STOP_IN_PSTATE_STOPPED = 0x25, + PGPE_OP_PSTATE_START_STOP_WHILE_PENDING = 0x26, + PGPE_OP_SET_PMCR_AND_PMCR_OWNER_NOT_OCC = 0x30, + PGPE_OP_SET_PMCR_IN_PSTATE_STOPPED = 0x31, + PGPE_OP_SET_PMCR_IN_SAFE_MODE = 0x32, + PGPE_OP_SET_PMCR_IN_PM_SUSP = 0x33, + PGPE_OP_SET_PMCR_WHILE_PENDING = 0x34, + PGPE_OP_CORES_ACTIVE_IN_SAFE_MODE = 0x40, + PGPE_OP_CORES_ACTIVE_IN_PM_SUSP = 0x41, + PGPE_OP_CORES_ACTIVE_IN_PSTATE_STOPPED = 0x42, + PGPE_OP_CORES_ACTIVE_IN_WOF_DISABLED = 0x43, + PGPE_OP_CORES_ACTIVE_WHILE_PENDING = 0x44, + PGPE_OP_QUADS_ACTIVE_IN_SAFE_MODE = 0x50, + PGPE_OP_QUADS_ACTIVE_IN_PM_SUSP = 0x51, + PGPE_OP_QUADS_ACTIVE_WHILE_PENDING = 0x52, + PGPE_OP_PCB_TYPE1_IN_PSTATE_STOPPED = 0x60, + PGPE_OP_PCB_TYPE1_IN_PMCR_OWNER_OCC = 0x61 +}; // //Functions called by threads diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c index c09afc0b..f65342bd 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_pstate.c @@ -284,7 +284,6 @@ void p9_pgpe_pstate_apply_clips() G_pgpe_pstate_record.quadPSCurr[q] = 0xFF; G_pgpe_pstate_record.quadPSNext[q] = 0xFF; } - } //Global PState Auction @@ -349,6 +348,7 @@ void p9_pgpe_pstate_calc_wof() PK_TRACE_DBG("WFC: FClip_PS=0x%x, vindex=%d, vratio=%d", G_pgpe_pstate_record.wofClip, G_pgpe_pstate_record.vindex, G_pgpe_pstate_record.vratio); + p9_pgpe_pstate_apply_clips(); G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.vratio << 16) | (G_pgpe_pstate_record.fratio << 8); G_pgpe_optrace_data.word[1] = (WOF_CALC_DONE << 24) | @@ -356,7 +356,6 @@ void p9_pgpe_pstate_calc_wof() (G_pgpe_pstate_record.activeQuads << 8) | G_pgpe_pstate_record.numActiveCores; p9_pgpe_optrace(WOF_CALC_DONE); - p9_pgpe_pstate_apply_clips(); } // @@ -428,7 +427,6 @@ void p9_pgpe_send_db0(uint64_t db0, uint32_t coreVector, uint32_t unicast, uint3 //In case of unicast, only write DB0 for active cores. However, in case of //multicast just write DB0 of every configured core, but care only about active cores. - p9_pgpe_optrace(ACTL_BROADCAST); if (unicast == PGPE_DB0_UNICAST) { @@ -487,7 +485,7 @@ void p9_pgpe_wait_cme_db_ack(uint32_t quadAckExpect) else if(!(G_pgpe_pstate_record.pendQuadsRegistration & QUAD_MASK(q))) { PK_TRACE_ERR("DBW:Unexpected qCME[%u] ACK", q); - PK_PANIC(PGPE_CME_UNEXPECTED_DB0_ACK); + PGPE_PANIC_AND_TRACE(PGPE_CME_UNEXPECTED_DB0_ACK); } } } @@ -495,7 +493,6 @@ void p9_pgpe_wait_cme_db_ack(uint32_t quadAckExpect) out32(OCB_OPIT4PRA_CLR, opit4Clr); } - p9_pgpe_optrace(ACK_ACTL_DONE); PK_TRACE_DBG("DBW:qCME ACKs rcvd"); } @@ -715,18 +712,6 @@ void p9_pgpe_pstate_start(uint32_t pstate_start_origin) PK_TRACE_INF("PST: PGPE_PSTATE_PROTOCOL_ACTIVE set"); out32(OCB_OCCS2, occScr2); - //7. Send Pstate Start ACK to OCC - if (pstate_start_origin == PSTATE_START_OCC_IPC) - { - ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd; - ipcmsg_start_stop_t* args = (ipcmsg_start_stop_t*)async_cmd->cmd_data; - args->msg_cb.rc = PGPE_RC_SUCCESS; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_START_STOP); - } - PK_TRACE_INF("PST: Start Done"); } @@ -769,7 +754,7 @@ void p9_pgpe_pstate_set_pmcr_owner(uint32_t owner) else { PK_TRACE_ERR("Invalid PMCR Owner=%u", owner); - PK_PANIC(PGPE_INVALID_PMCR_OWNER); + PGPE_PANIC_AND_TRACE(PGPE_INVALID_PMCR_OWNER); } //If OWNER is switched to CHAR, the last LMCR setting is retained @@ -805,14 +790,6 @@ void p9_pgpe_pstate_set_pmcr_owner(uint32_t owner) } } - G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.quadPSComputed[0] << 24) | (G_pgpe_pstate_record.quadPSComputed[1] - << 16) | - (G_pgpe_pstate_record.quadPSComputed[2] << 8) | G_pgpe_pstate_record.quadPSComputed[3]; - G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.quadPSComputed[4] << 24) | (G_pgpe_pstate_record.quadPSComputed[5] - << 16) | - G_pgpe_pstate_record.globalPSComputed << 8; - p9_pgpe_optrace(PRC_SET_PMCR); - #endif } @@ -939,12 +916,12 @@ void p9_pgpe_pstate_process_quad_entry_notify(uint32_t quadsRequested) p9_pgpe_pstate_updt_actual_quad(0xFC); //ACK back to SGPE - ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; - ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; - args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_QUAD_ACTV); + /* ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; + ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; + args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; + G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0; + ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS); + p9_pgpe_optrace(ACK_QUAD_ACTV);*/ PK_TRACE_INF("QE:(Notify) End,qAct=%x\n", G_pgpe_pstate_record.activeQuads); } @@ -966,12 +943,12 @@ void p9_pgpe_pstate_process_quad_entry_done(uint32_t quadsRequested) } //ACK back to SGPE - ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; + /*ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_QUAD_ACTV); + p9_pgpe_optrace(ACK_QUAD_ACTV);*/ PK_TRACE_INF("QE:(Done) End,qAct=%x\n", G_pgpe_pstate_record.activeQuads); } @@ -1023,12 +1000,12 @@ void p9_pgpe_pstate_process_quad_exit(uint32_t quadsRequested) G_pgpe_pstate_record.pendQuadsRegistration |= quadsRequested; //ACK back to SGPE - ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; - ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; - args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_QUAD_ACTV); + /* ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; + ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; + args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; + G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0; + ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS); + p9_pgpe_optrace(ACK_QUAD_ACTV);*/ PK_TRACE_INF("QX:End,qAct=%x\n", G_pgpe_pstate_record.activeQuads); } @@ -1144,7 +1121,7 @@ void p9_pgpe_pstate_send_suspend_stop() if(rc) { PK_TRACE_ERR("SUSP:Suspend Stop BAD ACK"); - PK_PANIC(PGPE_SGPE_SUSPEND_STOP_BAD_ACK); + PGPE_PANIC_AND_TRACE(PGPE_SGPE_SUSPEND_STOP_BAD_ACK); } #else @@ -1326,12 +1303,12 @@ void p9_pgpe_pstate_do_step() //Update Shared SRAM p9_pgpe_pstate_updt_actual_quad(0xFC); - G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.quadPSComputed[0] << 24) | (G_pgpe_pstate_record.quadPSComputed[1] + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.quadPSCurr[0] << 24) | (G_pgpe_pstate_record.quadPSCurr[1] << 16) | - (G_pgpe_pstate_record.quadPSComputed[2] << 8) | G_pgpe_pstate_record.quadPSComputed[3]; - G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.quadPSComputed[4] << 24) | (G_pgpe_pstate_record.quadPSComputed[5] + (G_pgpe_pstate_record.quadPSCurr[2] << 8) | G_pgpe_pstate_record.quadPSCurr[3]; + G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.quadPSCurr[4] << 24) | (G_pgpe_pstate_record.quadPSCurr[5] << 16) | - G_pgpe_pstate_record.globalPSNext << 8 | G_pgpe_pstate_record.globalPSTarget; + G_pgpe_pstate_record.globalPSCurr << 8 | G_pgpe_pstate_record.globalPSTarget; G_pgpe_optrace_data.word[2] = (G_pgpe_pstate_record.eVidCurr << 16) | G_pgpe_pstate_record.eVidCurr; p9_pgpe_optrace(ACTUATE_STEP_DONE); PK_TRACE_DBG("STEP: Exit"); @@ -1436,10 +1413,12 @@ void p9_pgpe_pstate_freq_updt() db0.fields.quad4_ps = G_pgpe_pstate_record.quadPSNext[4]; db0.fields.quad5_ps = G_pgpe_pstate_record.quadPSNext[5]; + p9_pgpe_optrace(ACTL_BROADCAST); p9_pgpe_send_db0(db0.value, G_pgpe_pstate_record.activeCores, PGPE_DB0_MULTICAST, PGPE_DB0_ACK_WAIT_CME); + p9_pgpe_optrace(ACK_ACTL_DONE); PK_TRACE_DBG("FREQ: Exit"); } diff --git a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c index 21fe6621..f41cb55e 100644 --- a/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c +++ b/import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_thread_process_requests.c @@ -164,7 +164,7 @@ void p9_pgpe_thread_process_requests(void* arg) void p9_pgpe_process_sgpe_updt_active_cores() { PK_TRACE_DBG("PTH: Core Updt Entry"); - uint32_t c; + uint32_t c, ack_now = 1; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd; ipcmsg_s2p_update_active_cores_t* args = (ipcmsg_s2p_update_active_cores_t*)async_cmd->cmd_data; @@ -174,9 +174,8 @@ void p9_pgpe_process_sgpe_updt_active_cores() { PK_TRACE_DBG("PTH: PM Suspended"); args->fields.return_code = IPC_SGPE_PGPE_RC_PM_COMPLEX_SUSPEND; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_CORES_ACTV); + G_pgpe_optrace_data.word[0] = PGPE_OP_CORES_ACTIVE_IN_PM_SUSP; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { @@ -186,9 +185,8 @@ void p9_pgpe_process_sgpe_updt_active_cores() { PK_TRACE_DBG("PTH: C Updt(WOF_Disabled)"); args->fields.return_code = PGPE_WOF_RC_NOT_ENABLED; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_CORES_ACTV); + G_pgpe_optrace_data.word[0] = PGPE_OP_CORES_ACTIVE_IN_WOF_DISABLED; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { @@ -210,11 +208,15 @@ void p9_pgpe_process_sgpe_updt_active_cores() } } + //OP_TRACE(Do before auction and wof calculation) + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | + ((args->fields.update_type == UPDATE_ACTIVE_CORES_TYPE_ENTRY) ? 0x2000000 : 0x1000000) | + (G_pgpe_pstate_record.activeCores >> 8); + p9_pgpe_optrace(PRC_CORES_ACTV); + //Do auction and wof calculation p9_pgpe_pstate_do_auction(); p9_pgpe_pstate_calc_wof(); - G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.activeCores >> 8); - p9_pgpe_optrace(PRC_CORES_ACTV); //If ENTRY type then send ACK to SGPE immediately //Otherwise, wait to ACK until WOF Clip has been applied(from actuate_pstate thread) @@ -222,14 +224,22 @@ void p9_pgpe_process_sgpe_updt_active_cores() { PK_TRACE_DBG("PTH: Core Entry ACK back to SGPE"); args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_CORES_ACTV); PK_TRACE_DBG("PTH: Core Updt ENTRY ACKed"); } + else + { + ack_now = 0; + } } } + if (ack_now == 1) + { + G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].pending_ack = 0; + ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_CORES_UPDT].cmd, IPC_RC_SUCCESS); + p9_pgpe_optrace(ACK_CORES_ACTV); + } + PK_TRACE_DBG("PTH: Core Updt Exit"); } @@ -239,6 +249,7 @@ void p9_pgpe_process_sgpe_updt_active_cores() void p9_pgpe_process_sgpe_updt_active_quads() { PK_TRACE_DBG("PTH: Quad Updt Start"); + uint32_t ack_now = 1; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd; ipcmsg_s2p_update_active_quads_t* args = (ipcmsg_s2p_update_active_quads_t*)async_cmd->cmd_data; G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_processing = 0; @@ -249,14 +260,22 @@ void p9_pgpe_process_sgpe_updt_active_quads() G_pgpe_pstate_record.pstatesStatus == PSTATE_SAFE_MODE) { args->fields.return_code = IPC_SGPE_PGPE_RC_PM_COMPLEX_SUSPEND; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_QUAD_ACTV); + G_pgpe_optrace_data.word[0] = PGPE_OP_QUADS_ACTIVE_IN_PM_SUSP; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { - G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (G_pgpe_pstate_record.activeCores >> 8); - p9_pgpe_optrace(PRC_QUAD_ACTV); + uint32_t SS; + + if(args->fields.update_type == UPDATE_ACTIVE_QUADS_TYPE_ENTRY) //entry + { + SS = (args->fields.entry_type == UPDATE_ACTIVE_QUADS_ENTRY_TYPE_NOTIFY) ? 0x2 : 0x3; + } + else //exit + { + SS = 0x1; + } + //ENTRY if (args->fields.update_type == UPDATE_ACTIVE_QUADS_TYPE_ENTRY) @@ -269,6 +288,8 @@ void p9_pgpe_process_sgpe_updt_active_quads() { p9_pgpe_pstate_process_quad_entry_done(args->fields.requested_quads << 2); } + + args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; } //EXIT else @@ -280,13 +301,26 @@ void p9_pgpe_process_sgpe_updt_active_quads() if(G_pgpe_pstate_record.wofEnabled == 1) { GPE_PUTSCOM(OCB_OCCFLG_OR, BIT32(REQUESTED_ACTIVE_QUAD_UPDATE));//Set OCCFLG[REQUESTED_ACTIVE_QUAD_UPDATE] + ack_now = 0; } else { p9_pgpe_pstate_process_quad_exit(args->fields.requested_quads << 2); + args->fields.return_code = IPC_SGPE_PGPE_RC_SUCCESS; } } + G_pgpe_optrace_data.word[0] = (args->fields.requested_quads << 26) | + (SS << 24) | + (G_pgpe_pstate_record.activeCores >> 8); + p9_pgpe_optrace(PRC_QUAD_ACTV); + } + + if (ack_now == 1) + { + G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].pending_ack = 0; + ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_SGPE_ACTIVE_QUADS_UPDT].cmd, IPC_RC_SUCCESS); + p9_pgpe_optrace(ACK_QUAD_ACTV); } PK_TRACE_DBG("PTH: Quad Updt End"); @@ -295,17 +329,20 @@ void p9_pgpe_process_sgpe_updt_active_quads() void p9_pgpe_process_start_stop() { PK_TRACE_DBG("PTH: Start/Stop Entry"); + uint32_t ack_now = 1; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd; ipcmsg_start_stop_t* args = (ipcmsg_start_stop_t*)async_cmd->cmd_data; + if(G_pgpe_header_data->g_pgpe_qm_flags & BIT16(PGPE_HEADER_FLAGS_OCC_IPC_IMMEDIATE_MODE)) { PK_TRACE_DBG("START_STOP: Imm"); args->msg_cb.rc = PGPE_RC_SUCCESS; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_START_STOP); - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; + G_pgpe_optrace_data.word[0] = (START_STOP_IPC << 24) | + (G_pgpe_pstate_record.globalPSComputed << 16) | + (in32(OCB_QCSR) >> 16); + p9_pgpe_optrace(PRC_START_STOP); + } else if(G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || @@ -313,10 +350,8 @@ void p9_pgpe_process_start_stop() { PK_TRACE_DBG("START_STOP: PM_SUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_START_STOP); - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; + G_pgpe_optrace_data.word[0] = PGPE_OP_PSTATE_START_IN_PM_SUSP; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { @@ -326,6 +361,7 @@ void p9_pgpe_process_start_stop() if(G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT || G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED) { p9_pgpe_pstate_start(PSTATE_START_OCC_IPC); + args->msg_cb.rc = PGPE_RC_SUCCESS; pk_semaphore_post(&G_pgpe_pstate_record.sem_actuate); } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_ACTIVE) @@ -333,11 +369,13 @@ void p9_pgpe_process_start_stop() PK_TRACE_DBG("START_STOP: PMCR OWNER Change to %d ", args->pmcr_owner); p9_pgpe_pstate_set_pmcr_owner(args->pmcr_owner); args->msg_cb.rc = PGPE_RC_SUCCESS; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_START_STOP); } + + G_pgpe_optrace_data.word[0] = (args->pmcr_owner << 25 ) | + (1 << 24) | + (G_pgpe_pstate_record.globalPSCurr << 16) | + (in32(OCB_QCSR) >> 16); + p9_pgpe_optrace(PRC_START_STOP); } else { @@ -346,28 +384,27 @@ void p9_pgpe_process_start_stop() { PK_TRACE_DBG("START_STOP: Already Stopped"); args->msg_cb.rc = PGPE_RC_REQ_PSTATE_ALREADY_STOPPED; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_START_STOP); - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; + G_pgpe_optrace_data.word[0] = PGPE_OP_PSTATE_STOP_IN_PSTATE_STOPPED; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_ACTIVE) { p9_pgpe_pstate_stop(); - ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd; - ipcmsg_start_stop_t* args = (ipcmsg_start_stop_t*)async_cmd->cmd_data; args->msg_cb.rc = PGPE_RC_SUCCESS; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; - G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; - ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); - p9_pgpe_optrace(ACK_START_STOP); + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.globalPSCurr << 16) | + (in32(OCB_QCSR) >> 16); + p9_pgpe_optrace(PRC_START_STOP); } } } - G_pgpe_optrace_data.word[0] = (START_STOP_IPC << 24) | (G_pgpe_pstate_record.globalPSComputed << 16) | (in32( - OCB_QCSR) >> 16); - p9_pgpe_optrace(PRC_START_STOP); + if (ack_now == 1) + { + ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].cmd, IPC_RC_SUCCESS); + G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_ack = 0; + G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_PSTATE_START_STOP].pending_processing = 0; + p9_pgpe_optrace(ACK_START_STOP); + } PK_TRACE_DBG("PTH: Start/Stop End"); } @@ -380,7 +417,7 @@ void p9_pgpe_process_clip_updt() { PK_TRACE_DBG("PTH: Clip Updt Entry"); - uint32_t q, ack = 0; + uint32_t q, ack_now = 1; ipc_async_cmd_t* async_cmd = (ipc_async_cmd_t*)G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].cmd; ipcmsg_clip_update_t* args = (ipcmsg_clip_update_t*)async_cmd->cmd_data; @@ -390,7 +427,19 @@ void p9_pgpe_process_clip_updt() { PK_TRACE_DBG("PTH: Clip Updt Imme"); args->msg_cb.rc = PGPE_RC_SUCCESS; - ack = 1; + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.psClipMax[0] << 24) | + (G_pgpe_pstate_record.psClipMax[1] << 16) | + (G_pgpe_pstate_record.psClipMax[2] << 8) | + (G_pgpe_pstate_record.psClipMax[3]); + G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.psClipMax[4] << 24) | + (G_pgpe_pstate_record.psClipMax[5] << 16) | + (G_pgpe_pstate_record.psClipMin[0] << 8) | + (G_pgpe_pstate_record.psClipMin[1]); + G_pgpe_optrace_data.word[2] = (G_pgpe_pstate_record.psClipMin[2] << 24) | + (G_pgpe_pstate_record.psClipMin[3] << 16) | + (G_pgpe_pstate_record.psClipMin[4] << 8) | + (G_pgpe_pstate_record.psClipMin[5]); + p9_pgpe_optrace(PRC_CLIP_UPDT); } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || @@ -398,7 +447,8 @@ void p9_pgpe_process_clip_updt() { PK_TRACE_DBG("PTH: Clip Updt PMSUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; - ack = 1; + G_pgpe_optrace_data.word[0] = PGPE_OP_CLIP_UPDT_IN_PM_SUSP; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { @@ -420,30 +470,43 @@ void p9_pgpe_process_clip_updt() } } + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.psClipMax[0] << 24) | + (G_pgpe_pstate_record.psClipMax[1] << 16) | + (G_pgpe_pstate_record.psClipMax[2] << 8) | + (G_pgpe_pstate_record.psClipMax[3]); + G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.psClipMax[4] << 24) | + (G_pgpe_pstate_record.psClipMax[5] << 16) | + (G_pgpe_pstate_record.psClipMin[0] << 8) | + (G_pgpe_pstate_record.psClipMin[1]); + G_pgpe_optrace_data.word[2] = (G_pgpe_pstate_record.psClipMin[2] << 24) | + (G_pgpe_pstate_record.psClipMin[3] << 16) | + (G_pgpe_pstate_record.psClipMin[4] << 8) | + (G_pgpe_pstate_record.psClipMin[5]); + p9_pgpe_optrace(PRC_CLIP_UPDT); + p9_pgpe_pstate_apply_clips(&G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT]); + //If CLIP_UPDT before Pstate Start, then ack now. Otherwise, ACK + //after actuation if (G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT || G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED) { args->msg_cb.rc = PGPE_RC_SUCCESS; - ack = 1; + } + else + { + ack_now = 0; } } - //Clips ACKed in error cases or if Pstates are not active - if (ack == 1) + + //Clips ACKed in error cases or if Pstates are not active yet + if (ack_now == 1) { G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].pending_ack = 0; ipc_send_rsp(G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_CLIP_UPDT].cmd, IPC_RC_SUCCESS); p9_pgpe_optrace(ACK_CLIP_UPDT); } - G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.psClipMax[0] << 24) | (G_pgpe_pstate_record.psClipMax[1] << 16) | - (G_pgpe_pstate_record.psClipMax[2] << 8) | (G_pgpe_pstate_record.psClipMax[3]); - G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.psClipMax[4] << 24) | (G_pgpe_pstate_record.psClipMax[5] << 16) | - (G_pgpe_pstate_record.psClipMin[0] << 8) | (G_pgpe_pstate_record.psClipMin[1]); - G_pgpe_optrace_data.word[2] = (G_pgpe_pstate_record.psClipMin[2] << 24) | (G_pgpe_pstate_record.psClipMin[3] << 16) | - (G_pgpe_pstate_record.psClipMin[4] << 8) | (G_pgpe_pstate_record.psClipMin[5]); - p9_pgpe_optrace(PRC_CLIP_UPDT); PK_TRACE_DBG("PTH: Clip Upd Exit"); } @@ -466,6 +529,10 @@ void p9_pgpe_process_wof_ctrl() { PK_TRACE_DBG("PTH: WOF Ctrl Imme"); args->msg_cb.rc = PGPE_RC_SUCCESS; + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | + (args->action << 16) | + (in32(OCB_QCSR) >> 16); + p9_pgpe_optrace(PRC_WOF_CTRL); } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || @@ -473,11 +540,15 @@ void p9_pgpe_process_wof_ctrl() { PK_TRACE_DBG("PTH: WOF Ctrl PMSUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_CTRL_IN_PM_SUSP; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else if(G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT || G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED) { PK_TRACE_DBG("PTH: WOF Ctrl PSStop/Init"); args->msg_cb.rc = PGPE_RC_PSTATES_NOT_STARTED; + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_CTRL_IN_PSTATE_STOPPED; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { @@ -509,7 +580,7 @@ void p9_pgpe_process_wof_ctrl() if(rc) { - PK_PANIC(PGPE_SGPE_IPC_SEND_BAD_RC); + PGPE_PANIC_AND_TRACE(PGPE_SGPE_IPC_SEND_BAD_RC); } //Wait for SGPE ACK with alive Quads @@ -525,7 +596,7 @@ void p9_pgpe_process_wof_ctrl() } else { - PK_PANIC(PGPE_SGPE_CTRL_STOP_UPDT_BAD_ACK); + PGPE_PANIC_AND_TRACE(PGPE_SGPE_CTRL_STOP_UPDT_BAD_ACK); } #endif// _SGPE_IPC_ENABLED_ @@ -534,11 +605,17 @@ void p9_pgpe_process_wof_ctrl() G_pgpe_pstate_record.wofEnabled = 1; p9_pgpe_pstate_calc_wof(); ack_now = 0; + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | + (args->action << 16) | + (in32(OCB_QCSR) >> 16); + p9_pgpe_optrace(PRC_WOF_CTRL); } else { args->msg_cb.rc = PGPE_RC_WOF_ALREADY_ON; PK_TRACE_DBG("PTH: WOF Ctrl=ON,WOF_Enabled=1"); + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_CTRL_ENABLE_WHEN_ENABLED; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } else if (args->action == PGPE_ACTION_WOF_OFF) @@ -567,7 +644,7 @@ void p9_pgpe_process_wof_ctrl() if(rc) { - PK_PANIC(PGPE_SGPE_IPC_SEND_BAD_RC); + PGPE_PANIC_AND_TRACE(PGPE_SGPE_IPC_SEND_BAD_RC); } //Wait for SGPE ACK with alive Quads @@ -583,26 +660,27 @@ void p9_pgpe_process_wof_ctrl() } else { - PK_PANIC(PGPE_SGPE_CTRL_STOP_UPDT_BAD_ACK); + PGPE_PANIC_AND_TRACE(PGPE_SGPE_CTRL_STOP_UPDT_BAD_ACK); } } #endif// _SGPE_IPC_ENABLED_ G_pgpe_pstate_record.wofEnabled = 0; + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | + (args->action << 16) | (in32(OCB_QCSR) >> 16); + p9_pgpe_optrace(PRC_WOF_CTRL); } else { args->msg_cb.rc = PGPE_RC_WOF_ALREADY_OFF; PK_TRACE_DBG("PTH: WOF Ctrl=OFF,WOF_Enabled=0"); + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_CTRL_DISABLE_WHEN_DISABLED; + p9_pgpe_optrace(UNEXPECTED_ERROR); } } } - G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.activeQuads << 24) | (args->action << 16) | (in32( - OCB_QCSR) >> 16); - p9_pgpe_optrace(PRC_WOF_CTRL); - if (ack_now == 1) { G_pgpe_pstate_record.ipcPendTbl[IPC_PEND_WOF_CTRL].pending_ack = 0; @@ -631,6 +709,9 @@ void p9_pgpe_process_wof_vfrt() { PK_TRACE_DBG("PTH: WOF VFRT Imme"); args->msg_cb.rc = PGPE_RC_SUCCESS; + G_pgpe_optrace_data.word[0] = 0; + G_pgpe_optrace_data.word[1] = 0; + p9_pgpe_optrace(PRC_WOF_VFRT); } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || @@ -638,18 +719,22 @@ void p9_pgpe_process_wof_vfrt() { PK_TRACE_DBG("PTH: WOF VFRT PMSUSP/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_VFRT_IN_SAFE_MODE; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else if(G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED || G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT) { PK_TRACE_DBG("PTH: WOF VFRT PSStop/Init"); args->msg_cb.rc = PGPE_RC_PSTATES_NOT_STARTED; + G_pgpe_optrace_data.word[0] = PGPE_OP_WOF_VFRT_IN_PSTATE_STOPPED; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { if(args->homer_vfrt_ptr == NULL) { PK_TRACE_ERR("PTH: NULL VFRT Ptr"); - PK_PANIC(PGPE_NULL_VFRT_POINTER); + PGPE_PANIC_AND_TRACE(PGPE_NULL_VFRT_POINTER); } //Update VFRT pointer @@ -704,24 +789,39 @@ void p9_pgpe_process_set_pmcr_req() if(G_pgpe_header_data->g_pgpe_qm_flags & BIT16(PGPE_HEADER_FLAGS_OCC_IPC_IMMEDIATE_MODE)) { PK_TRACE_DBG("PTH: Set PMCR Imme"); + p9_pgpe_optrace(PRC_SET_PMCR); args->msg_cb.rc = PGPE_RC_SUCCESS; + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.quadPSTarget[0] << 24) | + (G_pgpe_pstate_record.quadPSTarget[1] << 16) | + (G_pgpe_pstate_record.quadPSTarget[2] << 8) | + G_pgpe_pstate_record.quadPSTarget[3]; + G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.quadPSTarget[4] << 24) | + (G_pgpe_pstate_record.quadPSTarget[5] << 16) | + G_pgpe_pstate_record.globalPSTarget << 8; + p9_pgpe_optrace(PRC_SET_PMCR); } else if(G_pgpe_pstate_record.pmcrOwner != PMCR_OWNER_OCC) { PK_TRACE_DBG("PTH: !OCC_PMCR_OWNER"); args->msg_cb.rc = PGPE_RC_OCC_NOT_PMCR_OWNER; + G_pgpe_optrace_data.word[0] = PGPE_OP_SET_PMCR_AND_PMCR_OWNER_NOT_OCC; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_INIT || G_pgpe_pstate_record.pstatesStatus == PSTATE_STOPPED) { PK_TRACE_DBG("PTH: Pstates !Started"); args->msg_cb.rc = PGPE_RC_PSTATES_NOT_STARTED; + G_pgpe_optrace_data.word[0] = PGPE_OP_SET_PMCR_IN_PSTATE_STOPPED; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else if (G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPENDED || G_pgpe_pstate_record.pstatesStatus == PSTATE_PM_SUSPEND_PENDING || G_pgpe_pstate_record.pstatesStatus == PSTATE_SAFE_MODE) { - PK_TRACE_DBG("PTH: Clip Updt PMSUSP/Safe"); + PK_TRACE_DBG("PTH: Set PMCR in PM_Susp/Safe"); args->msg_cb.rc = PGPE_RC_PM_COMPLEX_SUSPEND_SAFE_MODE; + G_pgpe_optrace_data.word[0] = PGPE_OP_SET_PMCR_IN_PM_SUSP; + p9_pgpe_optrace(UNEXPECTED_ERROR); } else { @@ -737,6 +837,16 @@ void p9_pgpe_process_set_pmcr_req() PK_TRACE_DBG("PTH: coresPSReq: 0x%x", G_pgpe_pstate_record.coresPSRequest[q * CORES_PER_QUAD]); } + //PGPE Trace(PRC_SET_PMCR) + G_pgpe_optrace_data.word[0] = (G_pgpe_pstate_record.coresPSRequest[0] << 24) | + (G_pgpe_pstate_record.coresPSRequest[4] << 16) | + (G_pgpe_pstate_record.coresPSRequest[8] << 8) | + G_pgpe_pstate_record.coresPSRequest[12]; + G_pgpe_optrace_data.word[1] = (G_pgpe_pstate_record.coresPSRequest[16] << 24) | + (G_pgpe_pstate_record.coresPSRequest[20] << 16) | + G_pgpe_pstate_record.globalPSCurr << 8; + p9_pgpe_optrace(PRC_SET_PMCR); + p9_pgpe_pstate_do_auction(); p9_pgpe_pstate_apply_clips(); |