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| author | Christopher M. Riedl <cmriedl@us.ibm.com> | 2017-07-11 11:46:05 -0500 |
|---|---|---|
| committer | Joshua Hunsberger <jahunsbe@us.ibm.com> | 2017-10-23 18:18:59 -0500 |
| commit | da4ed2065190f066048a895af0697dbae09a76c2 (patch) | |
| tree | 7a2e91fb5058942bb4b5762ef8b05bec7e6ab637 | |
| parent | 24d9dcdb4e963f5592debad72bfc8b06d23f4dcb (diff) | |
| download | talos-hcode-da4ed2065190f066048a895af0697dbae09a76c2.tar.gz talos-hcode-da4ed2065190f066048a895af0697dbae09a76c2.zip | |
PM: Fix VDM Enablement Commit
Change-Id: I174397bfb53457cdc31965fd1fea7080e4982bc0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42989
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c index 63c7743c..beb78c31 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c +++ b/import/chips/p9/procedures/ppe_closed/cme/pstate_cme/p9_cme_thread_db.c @@ -171,8 +171,8 @@ void p9_cme_pstate_db_thread(void* arg) << (52 - (i * 4)); } - PK_TRACE_INF("qm | initial vdmcfgr=%08x%08x", scom_data.upper, - scom_data.lower); + PK_TRACE_INF("qm | initial vdmcfgr=%08x%08x", scom_data >> 32, + scom_data); ippm_write(QPPM_VDMCFGR, scom_data); // Assumes 100us has elapsed during cache chiplet wakeup after // enabling the full-speed cache clock grid |
